From patchwork Fri Nov 25 19:31:01 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Uros Bizjak X-Patchwork-Id: 127754 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id BFC371007D7 for ; Sat, 26 Nov 2011 06:31:22 +1100 (EST) Received: (qmail 2490 invoked by alias); 25 Nov 2011 19:31:20 -0000 Received: (qmail 2158 invoked by uid 22791); 25 Nov 2011 19:31:18 -0000 X-SWARE-Spam-Status: No, hits=-2.3 required=5.0 tests=AWL, BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, FREEMAIL_FROM, RCVD_IN_DNSWL_LOW, TW_ZJ X-Spam-Check-By: sourceware.org Received: from mail-gy0-f175.google.com (HELO mail-gy0-f175.google.com) (209.85.160.175) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Fri, 25 Nov 2011 19:31:01 +0000 Received: by ghy10 with SMTP id 10so4210554ghy.20 for ; Fri, 25 Nov 2011 11:31:01 -0800 (PST) MIME-Version: 1.0 Received: by 10.236.129.235 with SMTP id h71mr49132545yhi.114.1322249461048; Fri, 25 Nov 2011 11:31:01 -0800 (PST) Received: by 10.146.137.4 with HTTP; Fri, 25 Nov 2011 11:31:01 -0800 (PST) Date: Fri, 25 Nov 2011 20:31:01 +0100 Message-ID: Subject: [PATCH, testsuite]: Enable sync_long_long on 32bit x86 and alpha From: Uros Bizjak To: gcc-patches@gcc.gnu.org Cc: Richard Henderson , Andrew MacLeod Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Hello! Attached patch enables sync_long_long tests on 32bit x86 and alpha. Enabling the tests for alpha is obvious (it is 64bit-by-default target, after all), but 32bit x86 needs at least -march=pentium passed via dg-options. My previous patch checks bit_CMPXCHG8B cpuid bit before compiling these tests, so passing-march=pentium is safe. 2011-11-25 Uros Bizjak PR testsuite/51258 * lib/target-supports.exp (check_effective_target_sync_long_long): Also supported on 32bit x86 targets. Add comment about required dg-options. Add alpha*-*-* targets. (check_effective_target_sync_long_long_runtime): Ditto. * gcc.dg/atomic-op-4.c (dg-options): Add -march=pentium for 32bit x86 targets. * gcc.dg/atomic-compare-exchange-4.c: Ditto. * gcc.dg/atomic-exchange-4.c: Ditto. * gcc.dg/atomic-load-4.c: Ditto. * gcc.dg/atomic-store-4.c: Ditto. * gcc.dg/di-longlong64-sync-1.c: Ditto. * gcc.dg/di-sync-multithread.c: Ditto. * gcc.dg/simulate-thread/atomic-load-longlong.c: Ditto. * gcc.dg/simulate-thread/atomic-other-longlong.c: Ditto. Patch was tested on 32bit x86 build and alphaev68-pc-linux-gnu. Committed to mainline SVN. However, the patch uncovers certain problems with existing fild/fistpl implementation of atomic load/store. It fails in several of thread simulation tests, i.e. FAIL: gcc.dg/simulate-thread/atomic-load-longlong.c -O0 -g thread simulation test with: 1: x/i $pc => 0x8048582 : fild -0x8(%ebp) 0x08048585 104 __atomic_store_n (&result, ret, __ATOMIC_SEQ_CST); 1: x/i $pc => 0x8048585 : fistp 0x8049ac0 0x0804858b 104 __atomic_store_n (&result, ret, __ATOMIC_SEQ_CST); 1: x/i $pc => 0x804858b : lock orl $0x0,(%esp) FAIL: Invalid result returned from fetch I didn't check SSE, but it looks that fild/fistpl combo isn't atomic or does not obey "lock" barriers. Uros. Index: lib/target-supports.exp =================================================================== --- lib/target-supports.exp (revision 181727) +++ lib/target-supports.exp (working copy) @@ -3644,11 +3644,14 @@ } # Return 1 if the target supports atomic operations on "long long". +# +# Note: 32bit x86 targets require -march=pentium in dg-options. proc check_effective_target_sync_long_long { } { - if { ([istarget x86_64-*-*] || [istarget i?86-*-*]) - && ![is-effective-target ia32] - || [istarget arm*-*-*] } { + if { [istarget x86_64-*-*] + || [istarget i?86-*-*]) + || [istarget arm*-*-*] + || [istarget alpha*-*-*] } { return 1 } else { return 0 @@ -3657,10 +3660,12 @@ # Return 1 if the target supports atomic operations on "long long" # and can execute them. +# +# Note: 32bit x86 targets require -march=pentium in dg-options. proc check_effective_target_sync_long_long_runtime { } { - if { ([istarget x86_64-*-*] || [istarget i?86-*-*]) - && ![is-effective-target ia32] } { + if { [istarget x86_64-*-*] + || [istarget i?86-*-*] } { return [check_cached_effective_target sync_long_long_available { check_runtime_nocache sync_long_long_available { #include "cpuid.h" @@ -3689,6 +3694,8 @@ exit (0); } } "" ] + } elseif { [istarget alpha*-*-*] } { + return 1 } else { return 0 } Index: gcc.dg/atomic-compare-exchange-4.c =================================================================== --- gcc.dg/atomic-compare-exchange-4.c (revision 181727) +++ gcc.dg/atomic-compare-exchange-4.c (working copy) @@ -3,6 +3,7 @@ /* { dg-do run } */ /* { dg-require-effective-target sync_long_long_runtime } */ /* { dg-options "" } */ +/* { dg-options "-march=pentium" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */ /* Test the execution of __atomic_compare_exchange_n builtin for a long_long. */ Index: gcc.dg/di-longlong64-sync-1.c =================================================================== --- gcc.dg/di-longlong64-sync-1.c (revision 181727) +++ gcc.dg/di-longlong64-sync-1.c (working copy) @@ -1,6 +1,8 @@ /* { dg-do run } */ /* { dg-require-effective-target sync_long_long_runtime } */ /* { dg-options "-std=gnu99" } */ +/* { dg-additional-options "-march=pentium" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */ + /* { dg-message "note: '__sync_fetch_and_nand' changed semantics in GCC 4.4" "" { target *-*-* } 0 } */ /* { dg-message "note: '__sync_nand_and_fetch' changed semantics in GCC 4.4" "" { target *-*-* } 0 } */ Index: gcc.dg/atomic-load-4.c =================================================================== --- gcc.dg/atomic-load-4.c (revision 181727) +++ gcc.dg/atomic-load-4.c (working copy) @@ -3,6 +3,7 @@ /* { dg-do run } */ /* { dg-require-effective-target sync_long_long_runtime } */ /* { dg-options "" } */ +/* { dg-options "-march=pentium" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */ extern void abort(void); Index: gcc.dg/simulate-thread/atomic-load-longlong.c =================================================================== --- gcc.dg/simulate-thread/atomic-load-longlong.c (revision 181727) +++ gcc.dg/simulate-thread/atomic-load-longlong.c (working copy) @@ -1,6 +1,7 @@ /* { dg-do link } */ /* { dg-require-effective-target sync_long_long_runtime } */ /* { dg-options "" } */ +/* { dg-options "-march=pentium" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */ /* { dg-final { simulate-thread } } */ Index: gcc.dg/simulate-thread/atomic-other-longlong.c =================================================================== --- gcc.dg/simulate-thread/atomic-other-longlong.c (revision 181727) +++ gcc.dg/simulate-thread/atomic-other-longlong.c (working copy) @@ -1,6 +1,7 @@ /* { dg-do link } */ /* { dg-require-effective-target sync_long_long_runtime } */ /* { dg-options "" } */ +/* { dg-options "-march=pentium" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */ /* { dg-final { simulate-thread } } */ Index: gcc.dg/atomic-store-4.c =================================================================== --- gcc.dg/atomic-store-4.c (revision 181727) +++ gcc.dg/atomic-store-4.c (working copy) @@ -3,6 +3,7 @@ /* { dg-do run } */ /* { dg-require-effective-target sync_long_long_runtime } */ /* { dg-options "" } */ +/* { dg-options "-march=pentium" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */ /* Test the execution of the __atomic_store_n builtin for a long long. */ Index: gcc.dg/atomic-exchange-4.c =================================================================== --- gcc.dg/atomic-exchange-4.c (revision 181727) +++ gcc.dg/atomic-exchange-4.c (working copy) @@ -3,6 +3,7 @@ /* { dg-do run } */ /* { dg-require-effective-target sync_long_long_runtime } */ /* { dg-options "" } */ +/* { dg-options "-march=pentium" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */ /* Test the execution of the __atomic_X builtin for a long_long. */ Index: gcc.dg/atomic-op-4.c =================================================================== --- gcc.dg/atomic-op-4.c (revision 181727) +++ gcc.dg/atomic-op-4.c (working copy) @@ -3,6 +3,7 @@ /* { dg-do run } */ /* { dg-require-effective-target sync_long_long_runtime } */ /* { dg-options "" } */ +/* { dg-options "-march=pentium" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */ /* Test the execution of the __atomic_*OP builtin routines for long long. */ Index: gcc.dg/di-sync-multithread.c =================================================================== --- gcc.dg/di-sync-multithread.c (revision 181727) +++ gcc.dg/di-sync-multithread.c (working copy) @@ -3,6 +3,7 @@ /* { dg-require-effective-target pthread_h } */ /* { dg-require-effective-target pthread } */ /* { dg-options "-pthread -std=gnu99" } */ +/* { dg-additional-options "-march=pentium" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */ /* test of long long atomic ops performed in parallel in 3 pthreads david.gilbert@linaro.org */