Patchwork [U-Boot,v2] microblaze: usable uart16550 for big endian systems

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Submitter Stephan Linz
Date Nov. 24, 2011, 10:32 p.m.
Message ID <1322173972-11048-1-git-send-email-linz@li-pro.net>
Download mbox | patch
Permalink /patch/127624/
State Accepted
Commit 1de55ef105f9e00ea313c91679fed6560c63f447
Headers show

Comments

Stephan Linz - Nov. 24, 2011, 10:32 p.m.
As a result of the commit 6833260 the uart16550 driver
is broken for Microblaze big endian systems, because of
the missing 3 byte offset. Other than as described, not
all U-Boot BSP will treat properly the 3 byte offset.

This why prefer to mask out the 3 byte offset in general
and setup correct _REG_SIZE value depending on edianess.

Signed-off-by: Stephan Linz <linz@li-pro.net>
---
v2: Mask out 3 byte offset
    Set correct _REG_SIZE values for big/little endianess
---
 include/configs/microblaze-generic.h |    8 ++++++--
 1 files changed, 6 insertions(+), 2 deletions(-)
Michal Simek - Nov. 25, 2011, 10:30 a.m.
Stephan Linz wrote:
> As a result of the commit 6833260 the uart16550 driver
> is broken for Microblaze big endian systems, because of
> the missing 3 byte offset. Other than as described, not
> all U-Boot BSP will treat properly the 3 byte offset.
> 
> This why prefer to mask out the 3 byte offset in general
> and setup correct _REG_SIZE value depending on edianess.
> 
> Signed-off-by: Stephan Linz <linz@li-pro.net>
> ---
> v2: Mask out 3 byte offset
>     Set correct _REG_SIZE values for big/little endianess
> ---
>  include/configs/microblaze-generic.h |    8 ++++++--
>  1 files changed, 6 insertions(+), 2 deletions(-)

Tested-by: Michal Simek <monstr@monstr.eu>

Wolfgang: Can you please apply this patch directly to your repo.

Thanks,
Michal
Wolfgang Denk - Nov. 27, 2011, 2:49 p.m.
Dear Stephan Linz,

In message <1322173972-11048-1-git-send-email-linz@li-pro.net> you wrote:
> As a result of the commit 6833260 the uart16550 driver
> is broken for Microblaze big endian systems, because of
> the missing 3 byte offset. Other than as described, not
> all U-Boot BSP will treat properly the 3 byte offset.
> 
> This why prefer to mask out the 3 byte offset in general
> and setup correct _REG_SIZE value depending on edianess.
> 
> Signed-off-by: Stephan Linz <linz@li-pro.net>
> ---
> v2: Mask out 3 byte offset
>     Set correct _REG_SIZE values for big/little endianess
> ---
>  include/configs/microblaze-generic.h |    8 ++++++--
>  1 files changed, 6 insertions(+), 2 deletions(-)

Applied, thanks.

Best regards,

Wolfgang Denk
Wolfgang Denk - Nov. 27, 2011, 2:49 p.m.
Dear Michal Simek,

In message <4ECF6E4C.8010506@monstr.eu> you wrote:
> Stephan Linz wrote:
> > As a result of the commit 6833260 the uart16550 driver
> > is broken for Microblaze big endian systems, because of
> > the missing 3 byte offset. Other than as described, not
> > all U-Boot BSP will treat properly the 3 byte offset.
> > 
> > This why prefer to mask out the 3 byte offset in general
> > and setup correct _REG_SIZE value depending on edianess.
> > 
> > Signed-off-by: Stephan Linz <linz@li-pro.net>
> > ---
> > v2: Mask out 3 byte offset
> >     Set correct _REG_SIZE values for big/little endianess
> > ---
> >  include/configs/microblaze-generic.h |    8 ++++++--
> >  1 files changed, 6 insertions(+), 2 deletions(-)
> 
> Tested-by: Michal Simek <monstr@monstr.eu>
> 
> Wolfgang: Can you please apply this patch directly to your repo.

Yes, I can.  Done.

Best regards,

Wolfgang Denk

Patch

diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h
index 6b3fd76..03a6f5a 100644
--- a/include/configs/microblaze-generic.h
+++ b/include/configs/microblaze-generic.h
@@ -41,10 +41,14 @@ 
 #elif XILINX_UART16550_BASEADDR
 # define CONFIG_SYS_NS16550		1
 # define CONFIG_SYS_NS16550_SERIAL
-# define CONFIG_SYS_NS16550_REG_SIZE	-4
+# if defined(__MICROBLAZEEL__)
+#  define CONFIG_SYS_NS16550_REG_SIZE	-4
+# else
+#  define CONFIG_SYS_NS16550_REG_SIZE	4
+# endif
 # define CONFIG_CONS_INDEX		1
 # define CONFIG_SYS_NS16550_COM1 \
-			(XILINX_UART16550_BASEADDR + 0x1000)
+		((XILINX_UART16550_BASEADDR & ~0xF) + 0x1000)
 # define CONFIG_SYS_NS16550_CLK	XILINX_UART16550_CLOCK_HZ
 # define CONFIG_BAUDRATE	115200