From patchwork Tue Nov 22 20:34:57 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Benoit Canet X-Patchwork-Id: 127176 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 31D48B7105 for ; Wed, 23 Nov 2011 08:31:06 +1100 (EST) Received: from localhost ([::1]:52333 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RSx44-0005ZD-Jx for incoming@patchwork.ozlabs.org; Tue, 22 Nov 2011 15:35:36 -0500 Received: from eggs.gnu.org ([140.186.70.92]:59589) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RSx3l-00057G-Tu for qemu-devel@nongnu.org; Tue, 22 Nov 2011 15:35:19 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RSx3k-0004lE-JQ for qemu-devel@nongnu.org; Tue, 22 Nov 2011 15:35:17 -0500 Received: from mail-fx0-f45.google.com ([209.85.161.45]:37913) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RSx3k-0004j5-EU for qemu-devel@nongnu.org; Tue, 22 Nov 2011 15:35:16 -0500 Received: by mail-fx0-f45.google.com with SMTP id s14so959036faa.4 for ; Tue, 22 Nov 2011 12:35:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :mime-version:content-type:content-transfer-encoding; bh=wo5kk8WRza28wdrPvRcjSZilh/2AFCz3CGt0RmKomlE=; b=qucTeid0WtSJ0cwrBPzmTBpROBhZGf6CiH+P7xcpjgITORAhbHQ5WqmWmyA00gg7an FZG1vCsR09wtLMkri8jGTEqI6oRzmVM3vD9idj6YCnL0rLwPt2oX+Zj8hC/AIR0/r81F P2mbT0l33QQzDHSLawC2/bkUYCcioWMpYvQl4= Received: by 10.180.3.71 with SMTP id a7mr20629063wia.0.1321994115958; Tue, 22 Nov 2011 12:35:15 -0800 (PST) Received: from Laure.box.in.chocolate-blue.net ([109.190.18.76]) by mx.google.com with ESMTPS id w27sm17845828wbm.14.2011.11.22.12.35.14 (version=SSLv3 cipher=OTHER); Tue, 22 Nov 2011 12:35:15 -0800 (PST) From: =?UTF-8?q?Beno=C3=AEt=20Canet?= To: qemu-devel@nongnu.org Date: Tue, 22 Nov 2011 21:34:57 +0100 Message-Id: <1321994102-28263-7-git-send-email-benoit.canet@gmail.com> X-Mailer: git-send-email 1.7.7.3 In-Reply-To: <1321994102-28263-1-git-send-email-benoit.canet@gmail.com> References: <1321994102-28263-1-git-send-email-benoit.canet@gmail.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) X-Received-From: 209.85.161.45 Cc: =?UTF-8?q?Beno=C3=AEt=20Canet?= , avi@redhat.com Subject: [Qemu-devel] [PATCH v3 06/11] lm32_sys: convert to memory API X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Benoît Canet --- hw/lm32_sys.c | 28 ++++++++++++++-------------- 1 files changed, 14 insertions(+), 14 deletions(-) diff --git a/hw/lm32_sys.c b/hw/lm32_sys.c index e5ff962..0c8e971 100644 --- a/hw/lm32_sys.c +++ b/hw/lm32_sys.c @@ -47,6 +47,7 @@ enum { struct LM32SysState { SysBusDevice busdev; + MemoryRegion iomem; uint32_t base; uint32_t regs[R_MAX]; uint8_t testname[MAX_TESTNAME_LEN]; @@ -60,7 +61,8 @@ static void copy_testname(LM32SysState *s) s->testname[MAX_TESTNAME_LEN - 1] = '\0'; } -static void sys_write(void *opaque, target_phys_addr_t addr, uint32_t value) +static void sys_write(void *opaque, target_phys_addr_t addr, + uint64_t value, unsigned size) { LM32SysState *s = opaque; char *testname; @@ -89,16 +91,16 @@ static void sys_write(void *opaque, target_phys_addr_t addr, uint32_t value) } } -static CPUReadMemoryFunc * const sys_read_fn[] = { - NULL, - NULL, - NULL, -}; +static bool sys_ops_accepts(void *opaque, target_phys_addr_t addr, + unsigned size, bool is_write) +{ + return is_write && size == 4; +} -static CPUWriteMemoryFunc * const sys_write_fn[] = { - NULL, - NULL, - &sys_write, +static const MemoryRegionOps sys_ops = { + .write = sys_write, + .valid.accepts = sys_ops_accepts, + .endianness = DEVICE_NATIVE_ENDIAN, }; static void sys_reset(DeviceState *d) @@ -115,11 +117,9 @@ static void sys_reset(DeviceState *d) static int lm32_sys_init(SysBusDevice *dev) { LM32SysState *s = FROM_SYSBUS(typeof(*s), dev); - int sys_regs; - sys_regs = cpu_register_io_memory(sys_read_fn, sys_write_fn, s, - DEVICE_NATIVE_ENDIAN); - sysbus_init_mmio(dev, R_MAX * 4, sys_regs); + memory_region_init_io(&s->iomem, &sys_ops , s, "sys", R_MAX * 4); + sysbus_init_mmio_region(dev, &s->iomem); /* Note: This device is not created in the board initialization, * instead it has to be added with the -device parameter. Therefore,