Patchwork [v2,09/11] bonito: convert south bridge pci config to memory API

login
register
mail settings
Submitter Benoit Canet
Date Nov. 22, 2011, 4:32 p.m.
Message ID <1321979527-23921-10-git-send-email-benoit.canet@gmail.com>
Download mbox | patch
Permalink /patch/127140/
State New
Headers show

Comments

Benoit Canet - Nov. 22, 2011, 4:32 p.m.
Signed-off-by: BenoƮt Canet <benoit.canet@gmail.com>
---
 hw/bonito.c |   40 +++++++++++++++++++---------------------
 1 files changed, 19 insertions(+), 21 deletions(-)

Patch

diff --git a/hw/bonito.c b/hw/bonito.c
index 8fa709a..b4c3387 100644
--- a/hw/bonito.c
+++ b/hw/bonito.c
@@ -203,10 +203,7 @@  typedef struct PCIBonitoState
     /* Bonito registers */
     MemoryRegion iomem;
     MemoryRegion iomem_pciconf;
-
-    target_phys_addr_t bonito_spciconf_start;
-    target_phys_addr_t bonito_spciconf_length;
-    int bonito_spciconf_handle;
+    MemoryRegion iomem_spciconf;
 
     target_phys_addr_t bonito_pciio_start;
     target_phys_addr_t bonito_pciio_length;
@@ -597,16 +594,20 @@  static uint32_t bonito_spciconf_readl(void *opaque, target_phys_addr_t addr)
 }
 
 /* south bridge PCI configure space. 0x1fe8 0000 - 0x1fef ffff */
-static CPUWriteMemoryFunc * const bonito_spciconf_write[] = {
-    bonito_spciconf_writeb,
-    bonito_spciconf_writew,
-    bonito_spciconf_writel,
-};
-
-static CPUReadMemoryFunc * const bonito_spciconf_read[] = {
-    bonito_spciconf_readb,
-    bonito_spciconf_readw,
-    bonito_spciconf_readl,
+static const MemoryRegionOps bonito_spciconf_ops = {
+    .old_mmio = {
+        .read = {
+            bonito_spciconf_readb,
+            bonito_spciconf_readw,
+            bonito_spciconf_readl,
+        },
+        .write = {
+            bonito_spciconf_writeb,
+            bonito_spciconf_writew,
+            bonito_spciconf_writel,
+        },
+    },
+    .endianness = DEVICE_NATIVE_ENDIAN,
 };
 
 #define BONITO_IRQ_BASE 32
@@ -703,13 +704,10 @@  static int bonito_initfn(PCIDevice *dev)
     sysbus_mmio_map(sysbus, 1, BONITO_PCICONFIG_BASE);
 
     /* set the south bridge pci configure  mapping */
-    s->bonito_spciconf_handle = cpu_register_io_memory(bonito_spciconf_read,
-                                                       bonito_spciconf_write, s,
-                                                       DEVICE_NATIVE_ENDIAN);
-    s->bonito_spciconf_start = BONITO_SPCICONFIG_BASE;
-    s->bonito_spciconf_length = BONITO_SPCICONFIG_SIZE;
-    cpu_register_physical_memory(s->bonito_spciconf_start, s->bonito_spciconf_length,
-                                 s->bonito_spciconf_handle);
+    memory_region_init_io(&s->iomem_spciconf, &bonito_spciconf_ops, s,
+                          "south-bridge-pci-config", BONITO_SPCICONFIG_SIZE);
+    sysbus_init_mmio_region(sysbus, &s->iomem_spciconf);
+    sysbus_mmio_map(sysbus, 2, BONITO_SPCICONFIG_BASE);
 
     s->bonito_ldma_handle = cpu_register_io_memory(bonito_ldma_read,
                                                    bonito_ldma_write, s,