Patchwork [U-Boot,v5,2/3] mpc8xxx: update module_type values from JEDEC DDR3 SPD Specification

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Submitter Ira Snyder
Date Nov. 21, 2011, 9:20 p.m.
Message ID <1321910434-3067-3-git-send-email-iws@ovro.caltech.edu>
Download mbox | patch
Permalink /patch/126936/
State Accepted
Commit 2f3a71f235f442beb9419cee94ef6888b24f8259
Delegated to: Kumar Gala
Headers show

Comments

Ira Snyder - Nov. 21, 2011, 9:20 p.m.
Newer JEDEC DDR3 SPD Specifications define several additional values for
the DDR3 module_type field which were undefined when this code was
written. Update the code to handle the newer module types.

Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Cc: York Sun <yorksun@freescale.com>
---

New in v5. Supercedes the patch titled:
[PATCH v4 2/3] mpc8xxx: assume unregistered DIMM for invalid SPD module_type

JEDEC Specification used:
http://www.jedec.org/standards-documents/docs/spd-4010211

 arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c |    7 +++++++
 include/ddr_spd.h                               |    7 +++++++
 2 files changed, 14 insertions(+), 0 deletions(-)
York Sun - Nov. 21, 2011, 9:26 p.m.
On Mon, 2011-11-21 at 13:20 -0800, Ira W. Snyder wrote:
> Newer JEDEC DDR3 SPD Specifications define several additional values for
> the DDR3 module_type field which were undefined when this code was
> written. Update the code to handle the newer module types.
> 
> Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
> Cc: York Sun <yorksun@freescale.com>
> ---

Thanks. This looks much better.

York
Kumar Gala - Nov. 29, 2011, 3:07 p.m.
On Nov 21, 2011, at 3:20 PM, Ira W. Snyder wrote:

> Newer JEDEC DDR3 SPD Specifications define several additional values for
> the DDR3 module_type field which were undefined when this code was
> written. Update the code to handle the newer module types.
> 
> Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
> Cc: York Sun <yorksun@freescale.com>
> ---
> 
> New in v5. Supercedes the patch titled:
> [PATCH v4 2/3] mpc8xxx: assume unregistered DIMM for invalid SPD module_type
> 
> JEDEC Specification used:
> http://www.jedec.org/standards-documents/docs/spd-4010211
> 
> arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c |    7 +++++++
> include/ddr_spd.h                               |    7 +++++++
> 2 files changed, 14 insertions(+), 0 deletions(-)

applied to 85xx

- k

Patch

diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c b/arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c
index ffb503a..d0a5466 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c
@@ -135,6 +135,7 @@  ddr_compute_dimm_parameters(const ddr3_spd_eeprom_t *spd,
 	switch (spd->module_type & DDR3_SPD_MODULETYPE_MASK) {
 	case DDR3_SPD_MODULETYPE_RDIMM:
 	case DDR3_SPD_MODULETYPE_MINI_RDIMM:
+	case DDR3_SPD_MODULETYPE_72B_SO_RDIMM:
 		/* Registered/buffered DIMMs */
 		pdimm->registered_dimm = 1;
 		for (i = 0; i < 16; i += 2) {
@@ -148,6 +149,12 @@  ddr_compute_dimm_parameters(const ddr3_spd_eeprom_t *spd,
 	case DDR3_SPD_MODULETYPE_SO_DIMM:
 	case DDR3_SPD_MODULETYPE_MICRO_DIMM:
 	case DDR3_SPD_MODULETYPE_MINI_UDIMM:
+	case DDR3_SPD_MODULETYPE_MINI_CDIMM:
+	case DDR3_SPD_MODULETYPE_72B_SO_UDIMM:
+	case DDR3_SPD_MODULETYPE_72B_SO_CDIMM:
+	case DDR3_SPD_MODULETYPE_LRDIMM:
+	case DDR3_SPD_MODULETYPE_16B_SO_DIMM:
+	case DDR3_SPD_MODULETYPE_32B_SO_DIMM:
 		/* Unbuffered DIMMs */
 		if (spd->mod_section.unbuffered.addr_mapping & 0x1)
 			pdimm->mirrored_dimm = 1;
diff --git a/include/ddr_spd.h b/include/ddr_spd.h
index 40a0463..a9230b9 100644
--- a/include/ddr_spd.h
+++ b/include/ddr_spd.h
@@ -325,5 +325,12 @@  extern unsigned int ddr3_spd_check(const ddr3_spd_eeprom_t *spd);
 #define DDR3_SPD_MODULETYPE_MICRO_DIMM	(0x04)
 #define DDR3_SPD_MODULETYPE_MINI_RDIMM	(0x05)
 #define DDR3_SPD_MODULETYPE_MINI_UDIMM	(0x06)
+#define DDR3_SPD_MODULETYPE_MINI_CDIMM	(0x07)
+#define DDR3_SPD_MODULETYPE_72B_SO_UDIMM	(0x08)
+#define DDR3_SPD_MODULETYPE_72B_SO_RDIMM	(0x09)
+#define DDR3_SPD_MODULETYPE_72B_SO_CDIMM	(0x0A)
+#define DDR3_SPD_MODULETYPE_LRDIMM	(0x0B)
+#define DDR3_SPD_MODULETYPE_16B_SO_DIMM	(0x0C)
+#define DDR3_SPD_MODULETYPE_32B_SO_DIMM	(0x0D)
 
 #endif /* _DDR_SPD_H_ */