Patchwork UBUNTU: SAUCE: drm/i915: add multi-threaded forcewake support

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Submitter Manoj Iyer
Date Nov. 21, 2011, 6:17 p.m.
Message ID <1321899464-5337-1-git-send-email-manoj.iyer@canonical.com>
Download mbox | patch
Permalink /patch/126890/
State New
Headers show

Comments

Manoj Iyer - Nov. 21, 2011, 6:17 p.m.
From: Manoj Iyer <manoj.iyer@canonical.com>

This patch was submitted to intel-gfx by upstream and has not yet made it
to the linus tree, the patch was backported to Oneiric, and tested on
ivybridge system.

BugLink: http://bugs.launchpad.net/bugs/891270

Signed-off-by: Manoj Iyer <manoj.iyer@canonical.com>
---
 drivers/gpu/drm/i915/i915_drv.c      |   30 ++++++++++++++++++++++++++----
 drivers/gpu/drm/i915/i915_drv.h      |    8 ++++++++
 drivers/gpu/drm/i915/i915_reg.h      |    4 ++++
 drivers/gpu/drm/i915/intel_display.c |   22 ++++++++++++++++++++++
 4 files changed, 60 insertions(+), 4 deletions(-)
Robert Hooker - Nov. 21, 2011, 6:31 p.m.
Note: This will be coming in via 3.2 updates in the not too distant
future for precise
Tim Gardner - Nov. 21, 2011, 6:47 p.m.
On 11/21/2011 11:17 AM, manoj.iyer@canonical.com wrote:
> From: Manoj Iyer<manoj.iyer@canonical.com>
>
> This patch was submitted to intel-gfx by upstream and has not yet made it
> to the linus tree, the patch was backported to Oneiric, and tested on
> ivybridge system.
>
> BugLink: http://bugs.launchpad.net/bugs/891270
>
> Signed-off-by: Manoj Iyer<manoj.iyer@canonical.com>
> ---
>   drivers/gpu/drm/i915/i915_drv.c      |   30 ++++++++++++++++++++++++++----
>   drivers/gpu/drm/i915/i915_drv.h      |    8 ++++++++
>   drivers/gpu/drm/i915/i915_reg.h      |    4 ++++
>   drivers/gpu/drm/i915/intel_display.c |   22 ++++++++++++++++++++++
>   4 files changed, 60 insertions(+), 4 deletions(-)
>

Manoj - you must maintain the original upstream attribution even for a 
backport.
Manoj Iyer - Nov. 21, 2011, 6:50 p.m.
On Mon, 21 Nov 2011, Tim Gardner wrote:

> On 11/21/2011 11:17 AM, manoj.iyer@canonical.com wrote:
>> From: Manoj Iyer<manoj.iyer@canonical.com>
>> 
>> This patch was submitted to intel-gfx by upstream and has not yet made it
>> to the linus tree, the patch was backported to Oneiric, and tested on
>> ivybridge system.
>> 
>> BugLink: http://bugs.launchpad.net/bugs/891270
>> 
>> Signed-off-by: Manoj Iyer<manoj.iyer@canonical.com>
>> ---
>>   drivers/gpu/drm/i915/i915_drv.c      |   30 
>> ++++++++++++++++++++++++++----
>>   drivers/gpu/drm/i915/i915_drv.h      |    8 ++++++++
>>   drivers/gpu/drm/i915/i915_reg.h      |    4 ++++
>>   drivers/gpu/drm/i915/intel_display.c |   22 ++++++++++++++++++++++
>>   4 files changed, 60 insertions(+), 4 deletions(-)
>> 
>
> Manoj - you must maintain the original upstream attribution even for a 
> backport.

oops! ok will resend sorry.

>
> -- 
> Tim Gardner tim.gardner@canonical.com
>
>

--
====================
Manoj Iyer
Ubuntu/Canonical
Hardware Enablement
====================

Patch

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index eb91e2d..0b1a752 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -295,7 +295,7 @@  void intel_detect_pch (struct drm_device *dev)
 	}
 }
 
-static void __gen6_gt_force_wake_get(struct drm_i915_private *dev_priv)
+void __gen6_gt_force_wake_get(struct drm_i915_private *dev_priv)
 {
 	int count;
 
@@ -311,6 +311,22 @@  static void __gen6_gt_force_wake_get(struct drm_i915_private *dev_priv)
 		udelay(10);
 }
 
+void __gen6_gt_force_wake_mt_get(struct drm_i915_private *dev_priv)
+{
+	int count;
+
+	count = 0;
+	while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_MT_ACK) & 1))
+		udelay(10);
+
+	I915_WRITE_NOTRACE(FORCEWAKE_MT, (1<<16) | 1);
+	POSTING_READ(FORCEWAKE_MT);
+
+	count = 0;
+	while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_MT_ACK) & 1) == 0)
+		udelay(10);
+}
+
 /*
  * Generally this is called implicitly by the register read function. However,
  * if some sequence requires the GT to not power down then this function should
@@ -323,15 +339,21 @@  void gen6_gt_force_wake_get(struct drm_i915_private *dev_priv)
 
 	/* Forcewake is atomic in case we get in here without the lock */
 	if (atomic_add_return(1, &dev_priv->forcewake_count) == 1)
-		__gen6_gt_force_wake_get(dev_priv);
+		dev_priv->display.force_wake_get(dev_priv);
 }
 
-static void __gen6_gt_force_wake_put(struct drm_i915_private *dev_priv)
+void __gen6_gt_force_wake_put(struct drm_i915_private *dev_priv)
 {
 	I915_WRITE_NOTRACE(FORCEWAKE, 0);
 	POSTING_READ(FORCEWAKE);
 }
 
+void __gen6_gt_force_wake_mt_put(struct drm_i915_private *dev_priv)
+{
+	I915_WRITE_NOTRACE(FORCEWAKE_MT, (1<<16) | 0);
+	POSTING_READ(FORCEWAKE_MT);
+}
+
 /*
  * see gen6_gt_force_wake_get()
  */
@@ -340,7 +362,7 @@  void gen6_gt_force_wake_put(struct drm_i915_private *dev_priv)
 	WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));
 
 	if (atomic_dec_and_test(&dev_priv->forcewake_count))
-		__gen6_gt_force_wake_put(dev_priv);
+		dev_priv->display.force_wake_put(dev_priv);
 }
 
 void __gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 1c44613..0d1ddca 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -107,6 +107,7 @@  struct opregion_header;
 struct opregion_acpi;
 struct opregion_swsci;
 struct opregion_asle;
+struct drm_i915_private;
 
 struct intel_opregion {
 	struct opregion_header *header;
@@ -215,6 +216,8 @@  struct drm_i915_display_funcs {
 	int (*queue_flip)(struct drm_device *dev, struct drm_crtc *crtc,
 			  struct drm_framebuffer *fb,
 			  struct drm_i915_gem_object *obj);
+	void (*force_wake_get)(struct drm_i915_private *dev_priv);
+	void (*force_wake_put)(struct drm_i915_private *dev_priv);
 	/* clock updates for mode set */
 	/* cursor updates */
 	/* render clock increase/decrease */
@@ -1299,6 +1302,11 @@  extern void gen6_set_rps(struct drm_device *dev, u8 val);
 extern void intel_detect_pch (struct drm_device *dev);
 extern int intel_trans_dp_port_sel (struct drm_crtc *crtc);
 
+extern void __gen6_gt_force_wake_get(struct drm_i915_private *dev_priv);
+extern void __gen6_gt_force_wake_mt_get(struct drm_i915_private *dev_priv);
+extern void __gen6_gt_force_wake_put(struct drm_i915_private *dev_priv);
+extern void __gen6_gt_force_wake_mt_put(struct drm_i915_private *dev_priv);
+
 /* overlay */
 #ifdef CONFIG_DEBUG_FS
 extern struct intel_overlay_error_state *intel_overlay_capture_error_state(struct drm_device *dev);
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 2c34d07..4c333d5 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3362,6 +3362,10 @@ 
 
 #define  FORCEWAKE				0xA18C
 #define  FORCEWAKE_ACK				0x130090
+#define  FORCEWAKE_MT				0xa188 /* multi-threaded */
+#define  FORCEWAKE_MT_ACK			0x130040
+#define  ECOBUS					0xa180
+#define    FORCEWAKE_MT_ENABLE			(1<<5)
 
 #define  GT_FIFO_FREE_ENTRIES			0x120008
 
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index e917c7b..f0cddd6 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -7689,6 +7689,28 @@  static void intel_init_display(struct drm_device *dev)
 
 	/* For FIFO watermark updates */
 	if (HAS_PCH_SPLIT(dev)) {
+		dev_priv->display.force_wake_get = __gen6_gt_force_wake_get;
+		dev_priv->display.force_wake_put = __gen6_gt_force_wake_put;
+
+		/* IVB configs may use multi-threaded forcewake */
+		if (IS_IVYBRIDGE(dev)) {
+			u32	ecobus;
+
+			mutex_lock(&dev->struct_mutex);
+			__gen6_gt_force_wake_mt_get(dev_priv);
+			ecobus = I915_READ(ECOBUS);
+			__gen6_gt_force_wake_mt_put(dev_priv);
+			mutex_unlock(&dev->struct_mutex);
+
+			if (ecobus & FORCEWAKE_MT_ENABLE) {
+				DRM_DEBUG_KMS("Using MT version of forcewake\n");
+				dev_priv->display.force_wake_get =
+					__gen6_gt_force_wake_mt_get;
+				dev_priv->display.force_wake_put =
+					__gen6_gt_force_wake_mt_put;
+			}
+		}
+
 		if (HAS_PCH_IBX(dev))
 			dev_priv->display.init_pch_clock_gating = ibx_init_clock_gating;
 		else if (HAS_PCH_CPT(dev))