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[2/2] i2c: designware: Calculate SCL timing parameter for High Speed Mode

Message ID 20200407133439.23422-3-wan.ahmad.zainie.wan.mohamad@intel.com
State Accepted
Headers show
Series [1/2] i2c: designware: Calculate SCL timing parameter for Fast Mode Plus | expand

Commit Message

Wan Ahmad Zainie April 7, 2020, 1:34 p.m. UTC 
Custom parameters for HCNT/LCNT are not available for OF based system.
Thus, we will use existing SCL timing parameter calculation functions
for High Speed Mode too.

The value for the parameters tSYMBOL and tLOW is taken from DesignWare
DW_apb_i2c Databook v2.01a, section 3.15.4.6. The calculation should
assume higher bus load since it gives slower timing parameter.

Signed-off-by: Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
 drivers/i2c/busses/i2c-designware-master.c | 18 +++++++++++++++---
 1 file changed, 15 insertions(+), 3 deletions(-)

Comments

Jarkko Nikula April 8, 2020, 7:09 a.m. UTC | #1 
On 4/7/20 4:34 PM, Wan Ahmad Zainie wrote:
> Custom parameters for HCNT/LCNT are not available for OF based system.
> Thus, we will use existing SCL timing parameter calculation functions
> for High Speed Mode too.
> 
> The value for the parameters tSYMBOL and tLOW is taken from DesignWare
> DW_apb_i2c Databook v2.01a, section 3.15.4.6. The calculation should
> assume higher bus load since it gives slower timing parameter.
> 
> Signed-off-by: Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> ---
>   drivers/i2c/busses/i2c-designware-master.c | 18 +++++++++++++++---
>   1 file changed, 15 insertions(+), 3 deletions(-)
> 
Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Wolfram Sang April 15, 2020, 11:14 a.m. UTC | #2 
On Tue, Apr 07, 2020 at 09:34:39PM +0800, Wan Ahmad Zainie wrote:
> Custom parameters for HCNT/LCNT are not available for OF based system.
> Thus, we will use existing SCL timing parameter calculation functions
> for High Speed Mode too.
> 
> The value for the parameters tSYMBOL and tLOW is taken from DesignWare
> DW_apb_i2c Databook v2.01a, section 3.15.4.6. The calculation should
> assume higher bus load since it gives slower timing parameter.
> 
> Signed-off-by: Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

Applied to for-next, thanks!
diff mbox series

Patch

diff --git a/drivers/i2c/busses/i2c-designware-master.c b/drivers/i2c/busses/i2c-designware-master.c
index 23038d7272da..b6c17b550d31 100644
--- a/drivers/i2c/busses/i2c-designware-master.c
+++ b/drivers/i2c/busses/i2c-designware-master.c
@@ -129,10 +129,22 @@  static int i2c_dw_set_timings_master(struct dw_i2c_dev *dev)
 			dev->master_cfg |= DW_IC_CON_SPEED_FAST;
 			dev->hs_hcnt = 0;
 			dev->hs_lcnt = 0;
-		} else if (dev->hs_hcnt && dev->hs_lcnt) {
-			dev_dbg(dev->dev, "High Speed Mode HCNT:LCNT = %d:%d\n",
-				dev->hs_hcnt, dev->hs_lcnt);
+		} else if (!dev->hs_hcnt || !dev->hs_lcnt) {
+			ic_clk = i2c_dw_clk_rate(dev);
+			dev->hs_hcnt =
+				i2c_dw_scl_hcnt(ic_clk,
+						160,	/* tHIGH = 160 ns */
+						sda_falling_time,
+						0,	/* DW default */
+						0);	/* No offset */
+			dev->hs_lcnt =
+				i2c_dw_scl_lcnt(ic_clk,
+						320,	/* tLOW = 320 ns */
+						scl_falling_time,
+						0);	/* No offset */
 		}
+		dev_dbg(dev->dev, "High Speed Mode HCNT:LCNT = %d:%d\n",
+			dev->hs_hcnt, dev->hs_lcnt);
 	}
 
 	ret = i2c_dw_set_sda_hold(dev);