[v2,01/11] aarch64: Accept 0 as first argument to compares

Message ID	20200402185353.11047-2-richard.henderson@linaro.org
State	New
Headers	show Return-Path: <gcc-patches-bounces@gcc.gnu.org> DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 32654388A024 To: gcc-patches@gcc.gnu.org Subject: [PATCH v2 01/11] aarch64: Accept 0 as first argument to compares Date: Thu, 2 Apr 2020 11:53:43 -0700 Message-Id: <20200402185353.11047-2-richard.henderson@linaro.org> In-Reply-To: <20200402185353.11047-1-richard.henderson@linaro.org> References: <20200402185353.11047-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: list From: Richard Henderson via Gcc-patches <gcc-patches@gcc.gnu.org> Reply-To: Richard Henderson <richard.henderson@linaro.org> Cc: richard.earnshaw@arm.com, segher@kernel.crashing.org, Wilco.Dijkstra@arm.com, marcus.shawcroft@arm.com Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" <gcc-patches-bounces@gcc.gnu.org>
Series	aarch64: Implement TImode comparisons \| expand [v2,00/11] aarch64: Implement TImode comparisons [v2,01/11] aarch64: Accept 0 as first argument to compares [v2,02/11] aarch64: Accept zeros in add<GPI>3_carryin [v2,03/11] aarch64: Provide expander for sub<GPI>3_compare1 [v2,04/11] aarch64: Introduce aarch64_expand_addsubti [v2,05/11] aarch64: Use UNSPEC_SBCS for subtract-with-borrow + output flags [v2,06/11] aarch64: Use UNSPEC_ADCS for add-with-carry + output flags [v2,07/11] aarch64: Remove CC_ADCmode [v2,08/11] aarch64: Accept -1 as second argument to add<mode>3_carryin [v2,09/11] aarch64: Adjust result of aarch64_gen_compare_reg [v2,10/11] aarch64: Implement TImode comparisons [v2,11/11] aarch64: Implement absti2

Message ID

20200402185353.11047-2-richard.henderson@linaro.org

State

New

Headers

DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 32654388A024
To: gcc-patches@gcc.gnu.org
Subject: [PATCH v2 01/11] aarch64: Accept 0 as first argument to compares
Date: Thu,  2 Apr 2020 11:53:43 -0700
Message-Id: <20200402185353.11047-2-richard.henderson@linaro.org>
In-Reply-To: <20200402185353.11047-1-richard.henderson@linaro.org>
References: <20200402185353.11047-1-richard.henderson@linaro.org>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
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From: Richard Henderson via Gcc-patches <gcc-patches@gcc.gnu.org>
Reply-To: Richard Henderson <richard.henderson@linaro.org>
Cc: richard.earnshaw@arm.com, segher@kernel.crashing.org,
	Wilco.Dijkstra@arm.com, marcus.shawcroft@arm.com
Errors-To: gcc-patches-bounces@gcc.gnu.org
Sender: "Gcc-patches" <gcc-patches-bounces@gcc.gnu.org>

Series

aarch64: Implement TImode comparisons | expand

Commit Message

Li, Pan2 via Gcc-patches April 2, 2020, 6:53 p.m. UTC

While cmp (extended register) and cmp (immediate) uses <Wn|WSP>,
cmp (shifted register) uses <Wn>.  So we can perform cmp xzr, x0.

For ccmp, we only have <Wn> as an input.

	* config/aarch64/aarch64.md (cmp<GPI>): For operand 0, use
	aarch64_reg_or_zero.  Shuffle reg/reg to last alternative
	and accept Z.
	(@ccmpcc<GPI>): For operand 0, use aarch64_reg_or_zero and Z.
	(@ccmpcc<GPI>_rev): Likewise.
---
 gcc/config/aarch64/aarch64.md | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index c7c4d1dd519..6fdab5f3402 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -502,7 +502,7 @@ 
 	   [(match_operand 0 "cc_register" "")
 	    (const_int 0)])
 	  (compare:CC_ONLY
-	    (match_operand:GPI 2 "register_operand" "r,r,r")
+	    (match_operand:GPI 2 "aarch64_reg_or_zero" "rZ,rZ,rZ")
 	    (match_operand:GPI 3 "aarch64_ccmp_operand" "r,Uss,Usn"))
 	  (unspec:CC_ONLY
 	    [(match_operand 5 "immediate_operand")]
@@ -542,7 +542,7 @@ 
 	    [(match_operand 5 "immediate_operand")]
 	    UNSPEC_NZCV)
 	  (compare:CC_ONLY
-	    (match_operand:GPI 2 "register_operand" "r,r,r")
+	    (match_operand:GPI 2 "aarch64_reg_or_zero" "rZ,rZ,rZ")
 	    (match_operand:GPI 3 "aarch64_ccmp_operand" "r,Uss,Usn"))))]
   ""
   "@
@@ -3961,14 +3961,14 @@ 
 
 (define_insn "cmp<mode>"
   [(set (reg:CC CC_REGNUM)
-	(compare:CC (match_operand:GPI 0 "register_operand" "rk,rk,rk")
-		    (match_operand:GPI 1 "aarch64_plus_operand" "r,I,J")))]
+	(compare:CC (match_operand:GPI 0 "aarch64_reg_or_zero" "rk,rk,rkZ")
+		    (match_operand:GPI 1 "aarch64_plus_operand" "I,J,r")))]
   ""
   "@
-   cmp\\t%<w>0, %<w>1
    cmp\\t%<w>0, %1
-   cmn\\t%<w>0, #%n1"
-  [(set_attr "type" "alus_sreg,alus_imm,alus_imm")]
+   cmn\\t%<w>0, #%n1
+   cmp\\t%<w>0, %<w>1"
+  [(set_attr "type" "alus_imm,alus_imm,alus_sreg")]
 )
 
 (define_insn "fcmp<mode>"

[v2,01/11] aarch64: Accept 0 as first argument to compares

Commit Message

Patch