| Message ID | 20200327082405.104711-1-ley.foon.tan@intel.com |
|---|---|
| State | Superseded |
| Delegated to: | Simon Goldschmidt |
| Headers | show |
| Series | [RESEND] arm: dts: agilex: Enable QSPI | expand |
On 3/27/20 9:24 AM, Ley Foon Tan wrote: > Enable QSPI for Agilex SoC devkit. > > Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> > --- > arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi b/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi > index 1908be4b8b27..241c0efab14c 100644 > --- a/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi > +++ b/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi > @@ -37,3 +37,7 @@ > u-boot,dm-pre-reloc; > }; > > +&qspi { > + status = "okay"; > +} Is this for master or next ?
> On 3/27/20 9:24 AM, Ley Foon Tan wrote: > > Enable QSPI for Agilex SoC devkit. > > > > Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> > > --- > > arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi | 4 ++++ > > 1 file changed, 4 insertions(+) > > > > diff --git a/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi > b/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi > > index 1908be4b8b27..241c0efab14c 100644 > > --- a/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi > > +++ b/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi > > @@ -37,3 +37,7 @@ > > u-boot,dm-pre-reloc; > > }; > > > > +&qspi { > > + status = "okay"; > > +} > > Is this for master or next ? Will it be too late for master? If yes, then for next. Regards Ley Foon
On 3/30/20 3:21 AM, Tan, Ley Foon wrote: > >> On 3/27/20 9:24 AM, Ley Foon Tan wrote: >>> Enable QSPI for Agilex SoC devkit. >>> >>> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> >>> --- >>> arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi | 4 ++++ >>> 1 file changed, 4 insertions(+) >>> >>> diff --git a/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi >> b/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi >>> index 1908be4b8b27..241c0efab14c 100644 >>> --- a/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi >>> +++ b/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi >>> @@ -37,3 +37,7 @@ >>> u-boot,dm-pre-reloc; >>> }; >>> >>> +&qspi { >>> + status = "okay"; >>> +} >> >> Is this for master or next ? > Will it be too late for master? If yes, then for next. It's late, but if you feel adventurous and think this is gonna work fine, then I can put it into master. This is isolated to agilex, so I don't mind either way.
> -----Original Message----- > From: Marek Vasut <marex@denx.de> > Sent: Monday, March 30, 2020 9:29 AM > To: Tan, Ley Foon <ley.foon.tan@intel.com>; u-boot@lists.denx.de > Cc: Ley Foon Tan <lftan.linux@gmail.com>; See, Chin Liang > <chin.liang.see@intel.com>; Simon Goldschmidt > <simon.k.r.goldschmidt@gmail.com> > Subject: Re: [PATCH RESEND] arm: dts: agilex: Enable QSPI > > On 3/30/20 3:21 AM, Tan, Ley Foon wrote: > > > >> On 3/27/20 9:24 AM, Ley Foon Tan wrote: > >>> Enable QSPI for Agilex SoC devkit. > >>> > >>> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> > >>> --- > >>> arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi | 4 ++++ > >>> 1 file changed, 4 insertions(+) > >>> > >>> diff --git a/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi > >> b/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi > >>> index 1908be4b8b27..241c0efab14c 100644 > >>> --- a/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi > >>> +++ b/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi > >>> @@ -37,3 +37,7 @@ > >>> u-boot,dm-pre-reloc; > >>> }; > >>> > >>> +&qspi { > >>> + status = "okay"; > >>> +} > >> > >> Is this for master or next ? > > Will it be too late for master? If yes, then for next. > > It's late, but if you feel adventurous and think this is gonna work fine, then I > can put it into master. This is isolated to agilex, so I don't mind either way. Tested on Agilex board. Master should be okay. Thanks. Regards Ley Foon
On 3/30/20 3:34 AM, Tan, Ley Foon wrote: > > >> -----Original Message----- >> From: Marek Vasut <marex@denx.de> >> Sent: Monday, March 30, 2020 9:29 AM >> To: Tan, Ley Foon <ley.foon.tan@intel.com>; u-boot@lists.denx.de >> Cc: Ley Foon Tan <lftan.linux@gmail.com>; See, Chin Liang >> <chin.liang.see@intel.com>; Simon Goldschmidt >> <simon.k.r.goldschmidt@gmail.com> >> Subject: Re: [PATCH RESEND] arm: dts: agilex: Enable QSPI >> >> On 3/30/20 3:21 AM, Tan, Ley Foon wrote: >>> >>>> On 3/27/20 9:24 AM, Ley Foon Tan wrote: >>>>> Enable QSPI for Agilex SoC devkit. >>>>> >>>>> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> >>>>> --- >>>>> arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi | 4 ++++ >>>>> 1 file changed, 4 insertions(+) >>>>> >>>>> diff --git a/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi >>>> b/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi >>>>> index 1908be4b8b27..241c0efab14c 100644 >>>>> --- a/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi >>>>> +++ b/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi >>>>> @@ -37,3 +37,7 @@ >>>>> u-boot,dm-pre-reloc; >>>>> }; >>>>> >>>>> +&qspi { >>>>> + status = "okay"; >>>>> +} >>>> >>>> Is this for master or next ? >>> Will it be too late for master? If yes, then for next. >> >> It's late, but if you feel adventurous and think this is gonna work fine, then I >> can put it into master. This is isolated to agilex, so I don't mind either way. > Tested on Agilex board. Master should be okay. > Thanks. Then master it is.
> -----Original Message----- > From: Marek Vasut <marex@denx.de> > Sent: Monday, March 30, 2020 9:47 AM > To: Tan, Ley Foon <ley.foon.tan@intel.com>; u-boot@lists.denx.de > Cc: Ley Foon Tan <lftan.linux@gmail.com>; See, Chin Liang > <chin.liang.see@intel.com>; Simon Goldschmidt > <simon.k.r.goldschmidt@gmail.com> > Subject: Re: [PATCH RESEND] arm: dts: agilex: Enable QSPI > > On 3/30/20 3:34 AM, Tan, Ley Foon wrote: > > > > > >> -----Original Message----- > >> From: Marek Vasut <marex@denx.de> > >> Sent: Monday, March 30, 2020 9:29 AM > >> To: Tan, Ley Foon <ley.foon.tan@intel.com>; u-boot@lists.denx.de > >> Cc: Ley Foon Tan <lftan.linux@gmail.com>; See, Chin Liang > >> <chin.liang.see@intel.com>; Simon Goldschmidt > >> <simon.k.r.goldschmidt@gmail.com> > >> Subject: Re: [PATCH RESEND] arm: dts: agilex: Enable QSPI > >> > >> On 3/30/20 3:21 AM, Tan, Ley Foon wrote: > >>> > >>>> On 3/27/20 9:24 AM, Ley Foon Tan wrote: > >>>>> Enable QSPI for Agilex SoC devkit. > >>>>> > >>>>> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> > >>>>> --- > >>>>> arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi | 4 ++++ > >>>>> 1 file changed, 4 insertions(+) > >>>>> > >>>>> diff --git a/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi > >>>> b/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi > >>>>> index 1908be4b8b27..241c0efab14c 100644 > >>>>> --- a/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi > >>>>> +++ b/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi > >>>>> @@ -37,3 +37,7 @@ > >>>>> u-boot,dm-pre-reloc; > >>>>> }; > >>>>> > >>>>> +&qspi { > >>>>> + status = "okay"; > >>>>> +} > >>>> > >>>> Is this for master or next ? > >>> Will it be too late for master? If yes, then for next. > >> > >> It's late, but if you feel adventurous and think this is gonna work > >> fine, then I can put it into master. This is isolated to agilex, so I don't mind > either way. > > Tested on Agilex board. Master should be okay. > > Thanks. > > Then master it is. Thanks! Regards Ley Foon
On 3/30/20 3:47 AM, Marek Vasut wrote: > On 3/30/20 3:34 AM, Tan, Ley Foon wrote: >> >> >>> -----Original Message----- >>> From: Marek Vasut <marex@denx.de> >>> Sent: Monday, March 30, 2020 9:29 AM >>> To: Tan, Ley Foon <ley.foon.tan@intel.com>; u-boot@lists.denx.de >>> Cc: Ley Foon Tan <lftan.linux@gmail.com>; See, Chin Liang >>> <chin.liang.see@intel.com>; Simon Goldschmidt >>> <simon.k.r.goldschmidt@gmail.com> >>> Subject: Re: [PATCH RESEND] arm: dts: agilex: Enable QSPI >>> >>> On 3/30/20 3:21 AM, Tan, Ley Foon wrote: >>>> >>>>> On 3/27/20 9:24 AM, Ley Foon Tan wrote: >>>>>> Enable QSPI for Agilex SoC devkit. >>>>>> >>>>>> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> >>>>>> --- >>>>>> arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi | 4 ++++ >>>>>> 1 file changed, 4 insertions(+) >>>>>> >>>>>> diff --git a/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi >>>>> b/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi >>>>>> index 1908be4b8b27..241c0efab14c 100644 >>>>>> --- a/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi >>>>>> +++ b/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi >>>>>> @@ -37,3 +37,7 @@ >>>>>> u-boot,dm-pre-reloc; >>>>>> }; >>>>>> >>>>>> +&qspi { >>>>>> + status = "okay"; >>>>>> +} >>>>> >>>>> Is this for master or next ? >>>> Will it be too late for master? If yes, then for next. >>> >>> It's late, but if you feel adventurous and think this is gonna work fine, then I >>> can put it into master. This is isolated to agilex, so I don't mind either way. >> Tested on Agilex board. Master should be okay. >> Thanks. > > Then master it is. The u-boot-socfpga/master build fails when I apply this patch, so I'll be dropping it for now: +Error: arch/arm/dts/.socfpga_agilex_socdk.dtb.pre.tmp:141.57-142.1 syntax error +FATAL ERROR: Unable to parse input tree +make[3]: *** [arch/arm/dts/socfpga_agilex_socdk.dtb] Error 1 +make[2]: *** [arch-dtbs] Error 2 +make[1]: *** [dts/dt.dtb] Error 2 +make: *** [sub-make] Error 2
> >>>>> On 3/27/20 9:24 AM, Ley Foon Tan wrote: > >>>>>> Enable QSPI for Agilex SoC devkit. > >>>>>> > >>>>>> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> > >>>>>> --- > >>>>>> arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi | 4 ++++ > >>>>>> 1 file changed, 4 insertions(+) > >>>>>> > >>>>>> diff --git a/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi > >>>>> b/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi > >>>>>> index 1908be4b8b27..241c0efab14c 100644 > >>>>>> --- a/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi > >>>>>> +++ b/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi > >>>>>> @@ -37,3 +37,7 @@ > >>>>>> u-boot,dm-pre-reloc; > >>>>>> }; > >>>>>> > >>>>>> +&qspi { > >>>>>> + status = "okay"; > >>>>>> +} > >>>>> > >>>>> Is this for master or next ? > >>>> Will it be too late for master? If yes, then for next. > >>> > >>> It's late, but if you feel adventurous and think this is gonna work > >>> fine, then I can put it into master. This is isolated to agilex, so I don't > mind either way. > >> Tested on Agilex board. Master should be okay. > >> Thanks. > > > > Then master it is. > > The u-boot-socfpga/master build fails when I apply this patch, so I'll be > dropping it for now: > > +Error: arch/arm/dts/.socfpga_agilex_socdk.dtb.pre.tmp:141.57-142.1 > syntax error > +FATAL ERROR: Unable to parse input tree > +make[3]: *** [arch/arm/dts/socfpga_agilex_socdk.dtb] Error 1 > +make[2]: *** [arch-dtbs] Error 2 > +make[1]: *** [dts/dt.dtb] Error 2 > +make: *** [sub-make] Error 2 I've fixed it in local, but forgot regenerate the patch. Will send v2 patch. Sorry about this. Thanks. Regards Ley Foon
On 3/31/20 2:15 AM, Tan, Ley Foon wrote: >>>>>>> On 3/27/20 9:24 AM, Ley Foon Tan wrote: >>>>>>>> Enable QSPI for Agilex SoC devkit. >>>>>>>> >>>>>>>> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> >>>>>>>> --- >>>>>>>> arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi | 4 ++++ >>>>>>>> 1 file changed, 4 insertions(+) >>>>>>>> >>>>>>>> diff --git a/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi >>>>>>> b/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi >>>>>>>> index 1908be4b8b27..241c0efab14c 100644 >>>>>>>> --- a/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi >>>>>>>> +++ b/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi >>>>>>>> @@ -37,3 +37,7 @@ >>>>>>>> u-boot,dm-pre-reloc; >>>>>>>> }; >>>>>>>> >>>>>>>> +&qspi { >>>>>>>> + status = "okay"; >>>>>>>> +} >>>>>>> >>>>>>> Is this for master or next ? >>>>>> Will it be too late for master? If yes, then for next. >>>>> >>>>> It's late, but if you feel adventurous and think this is gonna work >>>>> fine, then I can put it into master. This is isolated to agilex, so I don't >> mind either way. >>>> Tested on Agilex board. Master should be okay. >>>> Thanks. >>> >>> Then master it is. >> >> The u-boot-socfpga/master build fails when I apply this patch, so I'll be >> dropping it for now: >> >> +Error: arch/arm/dts/.socfpga_agilex_socdk.dtb.pre.tmp:141.57-142.1 >> syntax error >> +FATAL ERROR: Unable to parse input tree >> +make[3]: *** [arch/arm/dts/socfpga_agilex_socdk.dtb] Error 1 >> +make[2]: *** [arch-dtbs] Error 2 >> +make[1]: *** [dts/dt.dtb] Error 2 >> +make: *** [sub-make] Error 2 > I've fixed it in local, but forgot regenerate the patch. > Will send v2 patch. Sorry about this. OK
diff --git a/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi b/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi index 1908be4b8b27..241c0efab14c 100644 --- a/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi +++ b/arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi @@ -37,3 +37,7 @@ u-boot,dm-pre-reloc; }; +&qspi { + status = "okay"; +} +
Enable QSPI for Agilex SoC devkit. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> --- arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi | 4 ++++ 1 file changed, 4 insertions(+)