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[14.202.190.183]) by smtp.gmail.com with ESMTPSA id b124sm831904pfa.34.2020.03.25.02.30.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 Mar 2020 02:30:50 -0700 (PDT) From: Nicholas Piggin To: linuxppc-dev@lists.ozlabs.org Subject: [PATCH 2/2] Fix 3 "[v3, 28/32] powerpc/64s: interrupt implement exit logic in C" Date: Wed, 25 Mar 2020 19:30:14 +1000 Message-Id: <20200325093014.149962-2-npiggin@gmail.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20200325093014.149962-1-npiggin@gmail.com> References: <20200325093014.149962-1-npiggin@gmail.com> MIME-Version: 1.0 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Nicholas Piggin Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" This fixes the interrupt-return part of the MSR_VSX restore bug caught by tm-unavailable selftest. Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/syscall_64.c | 24 +++++++++++++----------- 1 file changed, 13 insertions(+), 11 deletions(-) diff --git a/arch/powerpc/kernel/syscall_64.c b/arch/powerpc/kernel/syscall_64.c index 56533a26f3b7..a2995909b83b 100644 --- a/arch/powerpc/kernel/syscall_64.c +++ b/arch/powerpc/kernel/syscall_64.c @@ -251,19 +251,21 @@ notrace unsigned long interrupt_exit_user_prepare(struct pt_regs *regs, unsigned ti_flags = READ_ONCE(*ti_flagsp); } - if (IS_ENABLED(CONFIG_PPC_BOOK3S)) { - unsigned long mathflags = 0; - - if (IS_ENABLED(CONFIG_PPC_FPU)) - mathflags |= MSR_FP; - if (IS_ENABLED(CONFIG_ALTIVEC)) - mathflags |= MSR_VEC; - + if (IS_ENABLED(CONFIG_PPC_BOOK3S) && IS_ENABLED(CONFIG_PPC_FPU)) { if (IS_ENABLED(CONFIG_PPC_TRANSACTIONAL_MEM) && - (ti_flags & _TIF_RESTORE_TM)) + unlikely((ti_flags & _TIF_RESTORE_TM))) { restore_tm_state(regs); - else if ((regs->msr & mathflags) != mathflags) - restore_math(regs); + } else { + unsigned long mathflags = MSR_FP; + + if (cpu_has_feature(CPU_FTR_VSX)) + mathflags |= MSR_VEC | MSR_VSX; + else if (cpu_has_feature(CPU_FTR_ALTIVEC)) + mathflags |= MSR_VEC; + + if ((regs->msr & mathflags) != mathflags) + restore_math(regs); + } } trace_hardirqs_on();