diff mbox series

[PATCHv2,5/9] fsl-layerscape: Kconfig: Select RESV_RAM config if GIC_V3_ITS is enabled

Message ID 20200324081209.48449-6-Zhiqiang.Hou@nxp.com
State Changes Requested
Delegated to: Priyanka Jain
Headers show
Series fsl: layerscape: Initialize the GIC redistributor | expand

Commit Message

Z.Q. Hou March 24, 2020, 8:12 a.m. UTC 
From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

The GIC redistributor tables initialization depends on RESV_RAM config,
so select RESV_RAM if GIC_V3_ITS is enabled.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
V2:
 - The #6 of v1 patchset.

 arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 4 ++++
 1 file changed, 4 insertions(+)

Comments

Wasim Khan April 21, 2020, 7:34 a.m. UTC | #1 
> -----Original Message-----
> From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Zhiqiang Hou
> Sent: Tuesday, March 24, 2020 1:42 PM
> To: u-boot@lists.denx.de; Priyanka Jain <priyanka.jain@nxp.com>; Biwen Li
> <biwen.li@nxp.com>
> Cc: Z.q. Hou <zhiqiang.hou@nxp.com>
> Subject: [PATCHv2 5/9] fsl-layerscape: Kconfig: Select RESV_RAM config if
> GIC_V3_ITS is enabled
> 
> From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> 
> The GIC redistributor tables initialization depends on RESV_RAM config, so
> select RESV_RAM if GIC_V3_ITS is enabled.
> 
> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Wasim Khan <wasim.khan@nxp.com>

<snip>
Z.Q. Hou April 25, 2020, 8:40 a.m. UTC | #2 
Hi Wasim,

Thanks a lot for your review!

Regards,
Zhiqiang

> -----Original Message-----
> From: Wasim Khan <wasim.khan@nxp.com>
> Sent: 2020年4月21日 15:35
> To: Z.q. Hou <zhiqiang.hou@nxp.com>; u-boot@lists.denx.de; Priyanka Jain
> <priyanka.jain@nxp.com>; Biwen Li <biwen.li@nxp.com>
> Cc: Z.q. Hou <zhiqiang.hou@nxp.com>
> Subject: RE: [PATCHv2 5/9] fsl-layerscape: Kconfig: Select RESV_RAM config
> if GIC_V3_ITS is enabled
> 
> 
> 
> > -----Original Message-----
> > From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Zhiqiang Hou
> > Sent: Tuesday, March 24, 2020 1:42 PM
> > To: u-boot@lists.denx.de; Priyanka Jain <priyanka.jain@nxp.com>; Biwen
> > Li <biwen.li@nxp.com>
> > Cc: Z.q. Hou <zhiqiang.hou@nxp.com>
> > Subject: [PATCHv2 5/9] fsl-layerscape: Kconfig: Select RESV_RAM config
> > if GIC_V3_ITS is enabled
> >
> > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> >
> > The GIC redistributor tables initialization depends on RESV_RAM
> > config, so select RESV_RAM if GIC_V3_ITS is enabled.
> >
> > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> Reviewed-by: Wasim Khan <wasim.khan@nxp.com>
> 
> <snip>
diff mbox series

Patch

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 275c66d992..af1c148c26 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -46,6 +46,7 @@  config ARCH_LS1028A
 	select SYS_FSL_ERRATUM_A009663 if !TFABOOT
 	select SYS_FSL_ERRATUM_A009942 if !TFABOOT
 	select SYS_FSL_ERRATUM_A050382
+	select RESV_RAM if GIC_V3_ITS
 	imply PANIC_HANG
 
 config ARCH_LS1043A
@@ -152,6 +153,7 @@  config ARCH_LS1088A
 	select SYS_I2C_MXC_I2C2 if !TFABOOT
 	select SYS_I2C_MXC_I2C3 if !TFABOOT
 	select SYS_I2C_MXC_I2C4 if !TFABOOT
+	select RESV_RAM if GIC_V3_ITS
 	imply SCSI
 	imply PANIC_HANG
 
@@ -202,6 +204,7 @@  config ARCH_LS2080A
 	select SYS_I2C_MXC_I2C2 if !TFABOOT
 	select SYS_I2C_MXC_I2C3 if !TFABOOT
 	select SYS_I2C_MXC_I2C4 if !TFABOOT
+	select RESV_RAM if GIC_V3_ITS
 	imply DISTRO_DEFAULTS
 	imply PANIC_HANG
 
@@ -229,6 +232,7 @@  config ARCH_LX2160A
 	select ARCH_EARLY_INIT_R
 	select BOARD_EARLY_INIT_F
 	select SYS_I2C_MXC
+	select RESV_RAM if GIC_V3_ITS
 	imply DISTRO_DEFAULTS
 	imply PANIC_HANG
 	imply SCSI