arch/powerpc/64: Avoid isync in flush_dcache_range
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Message ID 20200320103242.229223-1-aneesh.kumar@linux.ibm.com
State Under Review
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  • arch/powerpc/64: Avoid isync in flush_dcache_range
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Commit Message

Aneesh Kumar K.V March 20, 2020, 10:32 a.m. UTC
As per ISA and isync is only needed on instruction cache
block invalidate. Remove the same from dcache invalidate.

Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
---
Note: IIUC we can also void the sync fore dcbf.

 arch/powerpc/include/asm/cacheflush.h | 6 +-----
 1 file changed, 1 insertion(+), 5 deletions(-)

Comments

Segher Boessenkool March 20, 2020, 3:05 p.m. UTC | #1
On Fri, Mar 20, 2020 at 04:02:42PM +0530, Aneesh Kumar K.V wrote:
> As per ISA and isync is only needed on instruction cache
> block invalidate. Remove the same from dcache invalidate.

Is that true on older CPUs?


Segher
Aneesh Kumar K.V March 20, 2020, 3:08 p.m. UTC | #2
On 3/20/20 8:35 PM, Segher Boessenkool wrote:
> On Fri, Mar 20, 2020 at 04:02:42PM +0530, Aneesh Kumar K.V wrote:
>> As per ISA and isync is only needed on instruction cache
>> block invalidate. Remove the same from dcache invalidate.
> 
> Is that true on older CPUs?
> 

That is what I found by checking with hardware team. One thing i was not 
able to get full confirmation about was the usage of 'sync' before 'dcbf'.

-aneesh
Segher Boessenkool March 20, 2020, 3:27 p.m. UTC | #3
On Fri, Mar 20, 2020 at 08:38:42PM +0530, Aneesh Kumar K.V wrote:
> On 3/20/20 8:35 PM, Segher Boessenkool wrote:
> >On Fri, Mar 20, 2020 at 04:02:42PM +0530, Aneesh Kumar K.V wrote:
> >>As per ISA and isync is only needed on instruction cache
> >>block invalidate. Remove the same from dcache invalidate.
> >
> >Is that true on older CPUs?
> >
> 
> That is what I found by checking with hardware team.

Oh, the comment right before this function says "does not invalidat
the corresponding insncache blocks", so this looks fine, sorry for not
looking closely enough before.

> One thing i was not 
> able to get full confirmation about was the usage of 'sync' before 'dcbf'.

Yeah, this looks like something that would matter on some implementations.
Would it make anything measurably faster if you would remove that sync?


Segher

Patch
diff mbox series

diff --git a/arch/powerpc/include/asm/cacheflush.h b/arch/powerpc/include/asm/cacheflush.h
index 4a1c9f0200e1..e92191b390f3 100644
--- a/arch/powerpc/include/asm/cacheflush.h
+++ b/arch/powerpc/include/asm/cacheflush.h
@@ -65,17 +65,13 @@  static inline void flush_dcache_range(unsigned long start, unsigned long stop)
 	unsigned long size = stop - (unsigned long)addr + (bytes - 1);
 	unsigned long i;
 
-	if (IS_ENABLED(CONFIG_PPC64)) {
+	if (IS_ENABLED(CONFIG_PPC64))
 		mb();	/* sync */
-		isync();
-	}
 
 	for (i = 0; i < size >> shift; i++, addr += bytes)
 		dcbf(addr);
 	mb();	/* sync */
 
-	if (IS_ENABLED(CONFIG_PPC64))
-		isync();
 }
 
 /*