From patchwork Tue Nov 15 11:14:00 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benoit Canet X-Patchwork-Id: 125764 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 83C1BB6F82 for ; Tue, 15 Nov 2011 23:20:36 +1100 (EST) Received: from localhost ([::1]:59112 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RQGyy-0002Mc-MU for incoming@patchwork.ozlabs.org; Tue, 15 Nov 2011 06:15:16 -0500 Received: from eggs.gnu.org ([140.186.70.92]:32795) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RQGy5-0007vX-GI for qemu-devel@nongnu.org; Tue, 15 Nov 2011 06:14:27 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RQGy4-0000MS-DX for qemu-devel@nongnu.org; Tue, 15 Nov 2011 06:14:21 -0500 Received: from mail-ww0-f53.google.com ([74.125.82.53]:38996) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RQGy4-0000KC-8o for qemu-devel@nongnu.org; Tue, 15 Nov 2011 06:14:20 -0500 Received: by mail-ww0-f53.google.com with SMTP id 27so4904272wwf.10 for ; Tue, 15 Nov 2011 03:14:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=Vw7zB/nDMFb1PJEXpDditsZJiiF6laxXzIZG0fCvLkQ=; b=m/2dmGGDLaGZTBfN9yJJMipfaZe3jNSkjNuFLrVrADyucBS2O+zGMoj/R38D90kbAA gSfgoFuqRJ3fuXlqUDNwG/l7aVjUXo3UU1gDStw2PZOjzkA44YGizvBh4/Sd4gVsiEBP MVVizznsekMURvco/7aAAdccxXlMpw/L2PUVU= Received: by 10.227.59.204 with SMTP id m12mr19407531wbh.14.1321355659933; Tue, 15 Nov 2011 03:14:19 -0800 (PST) Received: from Laure.box.in.chocolate-blue.net ([109.190.18.76]) by mx.google.com with ESMTPS id n18sm12476201wbm.19.2011.11.15.03.14.18 (version=SSLv3 cipher=OTHER); Tue, 15 Nov 2011 03:14:19 -0800 (PST) From: =?UTF-8?q?Beno=C3=AEt=20Canet?= To: qemu-devel@nongnu.org Date: Tue, 15 Nov 2011 12:14:00 +0100 Message-Id: <1321355644-1982-11-git-send-email-benoit.canet@gmail.com> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1321355644-1982-1-git-send-email-benoit.canet@gmail.com> References: <1321355644-1982-1-git-send-email-benoit.canet@gmail.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) X-Received-From: 74.125.82.53 Cc: blauwirbel@gmail.com, =?UTF-8?q?Beno=C3=AEt=20Canet?= , avi@redhat.com Subject: [Qemu-devel] [PATCH 10/14] slavio_intctl: convert slaves interrupt controllers to memory API X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Benoit Canet --- hw/slavio_intctl.c | 36 ++++++++++++++++++------------------ 1 files changed, 18 insertions(+), 18 deletions(-) diff --git a/hw/slavio_intctl.c b/hw/slavio_intctl.c index 0bc2a0b..e7812ed 100644 --- a/hw/slavio_intctl.c +++ b/hw/slavio_intctl.c @@ -46,6 +46,7 @@ struct SLAVIO_INTCTLState; typedef struct SLAVIO_CPUINTCTLState { + MemoryRegion iomem; struct SLAVIO_INTCTLState *master; uint32_t intreg_pending; uint32_t cpu; @@ -77,7 +78,8 @@ typedef struct SLAVIO_INTCTLState { static void slavio_check_interrupts(SLAVIO_INTCTLState *s, int set_irqs); // per-cpu interrupt controller -static uint32_t slavio_intctl_mem_readl(void *opaque, target_phys_addr_t addr) +static uint64_t slavio_intctl_mem_readl(void *opaque, target_phys_addr_t addr, + unsigned size) { SLAVIO_CPUINTCTLState *s = opaque; uint32_t saddr, ret; @@ -97,7 +99,7 @@ static uint32_t slavio_intctl_mem_readl(void *opaque, target_phys_addr_t addr) } static void slavio_intctl_mem_writel(void *opaque, target_phys_addr_t addr, - uint32_t val) + uint64_t val, unsigned size) { SLAVIO_CPUINTCTLState *s = opaque; uint32_t saddr; @@ -122,16 +124,14 @@ static void slavio_intctl_mem_writel(void *opaque, target_phys_addr_t addr, } } -static CPUReadMemoryFunc * const slavio_intctl_mem_read[3] = { - NULL, - NULL, - slavio_intctl_mem_readl, -}; - -static CPUWriteMemoryFunc * const slavio_intctl_mem_write[3] = { - NULL, - NULL, - slavio_intctl_mem_writel, +static const MemoryRegionOps slavio_intctl_mem_ops = { + .read = slavio_intctl_mem_readl, + .write = slavio_intctl_mem_writel, + .endianness = DEVICE_NATIVE_ENDIAN, + .valid = { + .min_access_size = 4, + .max_access_size = 4, + }, }; // master system interrupt controller @@ -422,8 +422,8 @@ static void slavio_intctl_reset(DeviceState *d) static int slavio_intctl_init1(SysBusDevice *dev) { SLAVIO_INTCTLState *s = FROM_SYSBUS(SLAVIO_INTCTLState, dev); - int io_memory; unsigned int i, j; + char slave_name[45]; qdev_init_gpio_in(&dev->qdev, slavio_set_irq_all, 32 + MAX_CPUS); memory_region_init_io(&s->iomem, &slavio_intctlm_mem_ops, s, @@ -431,14 +431,14 @@ static int slavio_intctl_init1(SysBusDevice *dev) sysbus_init_mmio_region(dev, &s->iomem); for (i = 0; i < MAX_CPUS; i++) { + snprintf(slave_name, sizeof(slave_name), + "slave-interrupt-controller-%i", i); for (j = 0; j < MAX_PILS; j++) { sysbus_init_irq(dev, &s->cpu_irqs[i][j]); } - io_memory = cpu_register_io_memory(slavio_intctl_mem_read, - slavio_intctl_mem_write, - &s->slaves[i], - DEVICE_NATIVE_ENDIAN); - sysbus_init_mmio(dev, INTCTL_SIZE, io_memory); + memory_region_init_io(&s->slaves[i].iomem, &slavio_intctl_mem_ops, + &s->slaves[i], slave_name, INTCTL_SIZE); + sysbus_init_mmio_region(dev, &s->slaves[i].iomem); s->slaves[i].cpu = i; s->slaves[i].master = s; }