Patchwork [v2] rtl8139: Fix invalid IO access alignment

login
register
mail settings
Submitter Julian Pidancet
Date Nov. 14, 2011, 8:35 p.m.
Message ID <77eaa9e77eb6236511d0fe4f209664c8855f8062.1321302712.git.julian.pidancet@gmail.com>
Download mbox | patch
Permalink /patch/125599/
State New
Headers show

Comments

Julian Pidancet - Nov. 14, 2011, 8:11 p.m.
On Mon, Nov 14, 2011 at 8:35 PM, Julian Pidancet
<julian.pidancet@gmail.com> wrote:
> This patch makes iPXE work with the rtl8139 emulation. The rtl8139
> driver in iPXE issues a 16bit access on the ChipCmd register
> (offset 0x37) to check the status of the rx buffer. The offset of the
> ioport access was getting fixed up to 0x36 in qemu, causing the value
> read in iPXE to be invalid.
>
> This fixes an issue with iPXE reporting timeouts during TFTP transfers.
>
> v2: Remove completely the 0xff masks as they're useless since the
> calling functions already do the job.
>

FYI: I just sent a patch on the iPXE mailing list:
http://lists.ipxe.org/pipermail/ipxe-devel/2011-November/001000.html
Julian Pidancet - Nov. 14, 2011, 8:35 p.m.
This patch makes iPXE work with the rtl8139 emulation. The rtl8139
driver in iPXE issues a 16bit access on the ChipCmd register
(offset 0x37) to check the status of the rx buffer. The offset of the
ioport access was getting fixed up to 0x36 in qemu, causing the value
read in iPXE to be invalid.

This fixes an issue with iPXE reporting timeouts during TFTP transfers.

v2: Remove completely the 0xff masks as they're useless since the
calling functions already do the job.

Signed-off-by: Julian Pidancet <julian.pidancet@gmail.com>
---
 hw/rtl8139.c |   14 +-------------
 1 files changed, 1 insertions(+), 13 deletions(-)

Patch

diff --git a/hw/rtl8139.c b/hw/rtl8139.c
index 4c37993..aa8ed0a 100644
--- a/hw/rtl8139.c
+++ b/hw/rtl8139.c
@@ -1971,7 +1971,7 @@  static int rtl8139_cplus_transmit_one(RTL8139State *s)
     cplus_tx_ring_desc += 16 * descriptor;
 
     DPRINTF("+++ C+ mode reading TX descriptor %d from host memory at "
-        "%08x0x%08x = 0x"DMA_ADDR_FMT"\n", descriptor, s->TxAddr[1],
+        "%08x %08x = 0x"DMA_ADDR_FMT"\n", descriptor, s->TxAddr[1],
         s->TxAddr[0], cplus_tx_ring_desc);
 
     uint32_t val, txdw0,txdw1,txbufLO,txbufHI;
@@ -2713,8 +2713,6 @@  static void rtl8139_io_writeb(void *opaque, uint8_t addr, uint32_t val)
 {
     RTL8139State *s = opaque;
 
-    addr &= 0xff;
-
     switch (addr)
     {
         case MAC0 ... MAC0+5:
@@ -2800,8 +2798,6 @@  static void rtl8139_io_writew(void *opaque, uint8_t addr, uint32_t val)
 {
     RTL8139State *s = opaque;
 
-    addr &= 0xfe;
-
     switch (addr)
     {
         case IntrMask:
@@ -2900,8 +2896,6 @@  static void rtl8139_io_writel(void *opaque, uint8_t addr, uint32_t val)
 {
     RTL8139State *s = opaque;
 
-    addr &= 0xfc;
-
     switch (addr)
     {
         case RxMissed:
@@ -2969,8 +2963,6 @@  static uint32_t rtl8139_io_readb(void *opaque, uint8_t addr)
     RTL8139State *s = opaque;
     int ret;
 
-    addr &= 0xff;
-
     switch (addr)
     {
         case MAC0 ... MAC0+5:
@@ -3043,8 +3035,6 @@  static uint32_t rtl8139_io_readw(void *opaque, uint8_t addr)
     RTL8139State *s = opaque;
     uint32_t ret;
 
-    addr &= 0xfe; /* mask lower bit */
-
     switch (addr)
     {
         case IntrMask:
@@ -3120,8 +3110,6 @@  static uint32_t rtl8139_io_readl(void *opaque, uint8_t addr)
     RTL8139State *s = opaque;
     uint32_t ret;
 
-    addr &= 0xfc; /* also mask low 2 bits */
-
     switch (addr)
     {
         case RxMissed: