Patchwork [U-Boot] Improve Power Management in SMC911X driver.

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Submitter bertrand.cachet@heig-vd.ch
Date Nov. 14, 2011, 9:01 a.m.
Message ID <1321261305-15816-1-git-send-email-bertrand.cachet@heig-vd.ch>
Download mbox | patch
Permalink /patch/125503/
State Changes Requested
Headers show

Comments

bertrand.cachet@heig-vd.ch - Nov. 14, 2011, 9:01 a.m.
From datasheet, when READY bit is set inside PM_CTRL register, it means that
device is already in *normal* (D0) mode => it doesn't need to be wake-up.

With this patch, we only wake-up (writing on TEST_BYTE register) if PM_MODE
bits of PM_CTRL register is in D1/D2 mode.

Signed-off-by: Bertrand Cachet <bertrand.cachet@heig-vd.ch>
---
 drivers/net/smc911x.h |    6 ++++--
 1 files changed, 4 insertions(+), 2 deletions(-)

Patch

diff --git a/drivers/net/smc911x.h b/drivers/net/smc911x.h
index 8ce08a9..258b9b6 100644
--- a/drivers/net/smc911x.h
+++ b/drivers/net/smc911x.h
@@ -471,8 +471,10 @@  static void smc911x_reset(struct eth_device *dev)
 {
 	int timeout;
 
-	/* Take out of PM setting first */
-	if (smc911x_reg_read(dev, PMT_CTRL) & PMT_CTRL_READY) {
+	/*  Take out of PM setting first */
+  /*  If PMT_CTRL_READY bit is set to 1b => power management is 
+      already ready */
+	if ((smc911x_reg_read(dev, PMT_CTRL) & PMT_CTRL_READY) == 0) {
 		/* Write to the bytetest will take out of powerdown */
 		smc911x_reg_write(dev, BYTE_TEST, 0x0);