From patchwork Sun Nov 13 14:18:39 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: hw/pxa2xx.c: Fix handling of RW bits in PMCR From: Peter Maydell X-Patchwork-Id: 125408 Message-Id: <1321193919-17148-1-git-send-email-peter.maydell@linaro.org> To: qemu-devel@nongnu.org Cc: Anthony Liguori , patches@linaro.org Date: Sun, 13 Nov 2011 14:18:39 +0000 Fix an error in commit afd4a6522 which meant that writing a zero to the RW bits in the PMCR wouldn't actually clear them. (Error spotted by Andrzej Zaborowski.) Signed-off-by: Peter Maydell --- This fixes the bug Andrzej pointed out in comments on the earlier patch; sorry about this error. I opted to use a separate & rather than merging the bit-clearing in with the W1C handling for clarity. hw/pxa2xx.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/hw/pxa2xx.c b/hw/pxa2xx.c index d38b922..e9a507e 100644 --- a/hw/pxa2xx.c +++ b/hw/pxa2xx.c @@ -117,6 +117,7 @@ static void pxa2xx_pm_write(void *opaque, target_phys_addr_t addr, /* Clear the write-one-to-clear bits... */ s->pm_regs[addr >> 2] &= ~(value & 0x2a); /* ...and set the plain r/w bits */ + s->pm_regs[addr >> 2] &= ~0x15; s->pm_regs[addr >> 2] |= value & 0x15; break;