Patchwork hw/pxa2xx.c: Fix handling of RW bits in PMCR

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Submitter Peter Maydell
Date Nov. 13, 2011, 2:18 p.m.
Message ID <1321193919-17148-1-git-send-email-peter.maydell@linaro.org>
Download mbox | patch
Permalink /patch/125408/
State New
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Comments

Peter Maydell - Nov. 13, 2011, 2:18 p.m.
Fix an error in commit afd4a6522 which meant that writing a zero
to the RW bits in the PMCR wouldn't actually clear them. (Error
spotted by Andrzej Zaborowski.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
This fixes the bug Andrzej pointed out in comments on the earlier
patch; sorry about this error. I opted to use a separate & rather
than merging the bit-clearing in with the W1C handling for clarity.

 hw/pxa2xx.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)
andrzej zaborowski - Nov. 14, 2011, 2:57 a.m.
On 13 November 2011 15:18, Peter Maydell <peter.maydell@linaro.org> wrote:
> Fix an error in commit afd4a6522 which meant that writing a zero
> to the RW bits in the PMCR wouldn't actually clear them. (Error
> spotted by Andrzej Zaborowski.)
>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Thanks, pushed.

Cheers

Patch

diff --git a/hw/pxa2xx.c b/hw/pxa2xx.c
index d38b922..e9a507e 100644
--- a/hw/pxa2xx.c
+++ b/hw/pxa2xx.c
@@ -117,6 +117,7 @@  static void pxa2xx_pm_write(void *opaque, target_phys_addr_t addr,
         /* Clear the write-one-to-clear bits... */
         s->pm_regs[addr >> 2] &= ~(value & 0x2a);
         /* ...and set the plain r/w bits */
+        s->pm_regs[addr >> 2] &= ~0x15;
         s->pm_regs[addr >> 2] |= value & 0x15;
         break;