diff mbox series

[5/5] riscv: Implement new SBI v0.2 extensions

Message ID 1583807731-16484-6-git-send-email-bmeng.cn@gmail.com
State Accepted
Commit 5bde2152d42515f7af46d210d7edf14e3b10d5f5
Delegated to: Andes
Headers show
Series riscv: Add new SBI v0.2 extensions support | expand

Commit Message

Bin Meng March 10, 2020, 2:35 a.m. UTC 
Few v0.1 SBI calls are being replaced by new SBI calls that follows
v0.2 calling convention.

Implement the replacement extensions and few additional new SBI
function calls that makes way for a better SBI interface in future.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

---

 arch/riscv/include/asm/sbi.h | 24 ++++++++++++++++++++++++
 arch/riscv/lib/sbi.c         | 16 +++++++++-------
 2 files changed, 33 insertions(+), 7 deletions(-)

Comments

Pragnesh Patel March 16, 2020, 11:27 a.m. UTC | #1 
Hi Bin,

>-----Original Message-----
>From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Bin Meng
>Sent: 10 March 2020 08:06
>To: Rick Chen <rick@andestech.com>; Anup Patel <anup.patel@wdc.com>;
>Atish Patra <atish.patra@wdc.com>; Lukas Auer
><lukas.auer@aisec.fraunhofer.de>; U-Boot Mailing List <u-
>boot@lists.denx.de>
>Subject: [PATCH 5/5] riscv: Implement new SBI v0.2 extensions
>
>Few v0.1 SBI calls are being replaced by new SBI calls that follows
>v0.2 calling convention.
>
>Implement the replacement extensions and few additional new SBI function
>calls that makes way for a better SBI interface in future.
>
>Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>
>---
>
> arch/riscv/include/asm/sbi.h | 24 ++++++++++++++++++++++++
> arch/riscv/lib/sbi.c         | 16 +++++++++-------
> 2 files changed, 33 insertions(+), 7 deletions(-)
>
>diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h index
>c65104f..3595ee8 100644
>--- a/arch/riscv/include/asm/sbi.h
>+++ b/arch/riscv/include/asm/sbi.h
>@@ -53,6 +53,30 @@ enum sbi_ext_rfence_fid {
> 	SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID,
> };
>
>+#ifdef CONFIG_SBI_V01
>+#define SBI_EXT_SET_TIMER		SBI_EXT_0_1_SET_TIMER
>+#define SBI_FID_SET_TIMER		0
>+#define SBI_EXT_SEND_IPI		SBI_EXT_0_1_SEND_IPI
>+#define SBI_FID_SEND_IPI		0
>+#define SBI_EXT_REMOTE_FENCE_I
>	SBI_EXT_0_1_REMOTE_FENCE_I
>+#define SBI_FID_REMOTE_FENCE_I		0
>+#define SBI_EXT_REMOTE_SFENCE_VMA
>	SBI_EXT_0_1_REMOTE_SFENCE_VMA
>+#define SBI_FID_REMOTE_SFENCE_VMA	0
>+#define SBI_EXT_REMOTE_SFENCE_VMA_ASID
>	SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID
>+#define SBI_FID_REMOTE_SFENCE_VMA_ASID	0
>+#else
>+#define SBI_EXT_SET_TIMER		SBI_EXT_TIME
>+#define SBI_FID_SET_TIMER		SBI_EXT_TIME_SET_TIMER
>+#define SBI_EXT_SEND_IPI		SBI_EXT_IPI
>+#define SBI_FID_SEND_IPI		SBI_EXT_IPI_SEND_IPI
>+#define SBI_EXT_REMOTE_FENCE_I		SBI_EXT_RFENCE
>+#define SBI_FID_REMOTE_FENCE_I
>	SBI_EXT_RFENCE_REMOTE_FENCE_I
>+#define SBI_EXT_REMOTE_SFENCE_VMA	SBI_EXT_RFENCE
>+#define SBI_FID_REMOTE_SFENCE_VMA
>	SBI_EXT_RFENCE_REMOTE_SFENCE_VMA
>+#define SBI_EXT_REMOTE_SFENCE_VMA_ASID	SBI_EXT_RFENCE
>+#define SBI_FID_REMOTE_SFENCE_VMA_ASID
>	SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID
>+#endif
>+
> #define SBI_SPEC_VERSION_DEFAULT	0x1
> #define SBI_SPEC_VERSION_MAJOR_SHIFT	24
> #define SBI_SPEC_VERSION_MAJOR_MASK	0x7f
>diff --git a/arch/riscv/lib/sbi.c b/arch/riscv/lib/sbi.c index 604a3a8..7bdf071
>100644
>--- a/arch/riscv/lib/sbi.c
>+++ b/arch/riscv/lib/sbi.c
>@@ -97,10 +97,11 @@ void sbi_shutdown(void)  void sbi_set_timer(uint64_t
>stime_value)  {  #if __riscv_xlen == 32
>-	sbi_ecall(SBI_EXT_0_1_SET_TIMER, 0, stime_value,
>+	sbi_ecall(SBI_EXT_SET_TIMER, SBI_FID_SET_TIMER, stime_value,
> 		  stime_value >> 32, 0, 0, 0, 0);
> #else
>-	sbi_ecall(SBI_EXT_0_1_SET_TIMER, 0, stime_value, 0, 0, 0, 0, 0);
>+	sbi_ecall(SBI_EXT_SET_TIMER, SBI_FID_SET_TIMER, stime_value,
>+		  0, 0, 0, 0, 0);
> #endif
> }
>
>@@ -112,7 +113,7 @@ void sbi_set_timer(uint64_t stime_value)
>  */
> void sbi_send_ipi(const unsigned long *hart_mask)  {
>-	sbi_ecall(SBI_EXT_0_1_SEND_IPI, 0, (unsigned long)hart_mask,
>+	sbi_ecall(SBI_EXT_SEND_IPI, SBI_FID_SEND_IPI, (unsigned
>+long)hart_mask,
> 		  0, 0, 0, 0, 0);
> }
>
>@@ -124,8 +125,8 @@ void sbi_send_ipi(const unsigned long *hart_mask)
>  */
> void sbi_remote_fence_i(const unsigned long *hart_mask)  {
>-	sbi_ecall(SBI_EXT_0_1_REMOTE_FENCE_I, 0, (unsigned
>long)hart_mask,
>-		  0, 0, 0, 0, 0);
>+	sbi_ecall(SBI_EXT_REMOTE_FENCE_I, SBI_FID_REMOTE_FENCE_I,
>+		  (unsigned long)hart_mask, 0, 0, 0, 0, 0);
> }
>
> /**
>@@ -141,7 +142,7 @@ void sbi_remote_sfence_vma(const unsigned long
>*hart_mask,
> 			   unsigned long start,
> 			   unsigned long size)
> {
>-	sbi_ecall(SBI_EXT_0_1_REMOTE_SFENCE_VMA, 0,
>+	sbi_ecall(SBI_EXT_REMOTE_SFENCE_VMA,
>SBI_FID_REMOTE_SFENCE_VMA,
> 		  (unsigned long)hart_mask, start, size, 0, 0, 0);  }
>
>@@ -161,7 +162,8 @@ void sbi_remote_sfence_vma_asid(const unsigned
>long *hart_mask,
> 				unsigned long size,
> 				unsigned long asid)
> {
>-	sbi_ecall(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, 0,
>+	sbi_ecall(SBI_EXT_REMOTE_SFENCE_VMA_ASID,
>+		  SBI_FID_REMOTE_SFENCE_VMA_ASID,
> 		  (unsigned long)hart_mask, start, size, asid, 0, 0);  }
>

Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>

>--
>2.7.4
Atish Patra April 11, 2020, 12:27 a.m. UTC | #2 
On Mon, Mar 9, 2020 at 7:36 PM Bin Meng <bmeng.cn@gmail.com> wrote:
>
> Few v0.1 SBI calls are being replaced by new SBI calls that follows
> v0.2 calling convention.
>
> Implement the replacement extensions and few additional new SBI
> function calls that makes way for a better SBI interface in future.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>
> ---
>
>  arch/riscv/include/asm/sbi.h | 24 ++++++++++++++++++++++++
>  arch/riscv/lib/sbi.c         | 16 +++++++++-------
>  2 files changed, 33 insertions(+), 7 deletions(-)
>
> diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
> index c65104f..3595ee8 100644
> --- a/arch/riscv/include/asm/sbi.h
> +++ b/arch/riscv/include/asm/sbi.h
> @@ -53,6 +53,30 @@ enum sbi_ext_rfence_fid {
>         SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID,
>  };
>
> +#ifdef CONFIG_SBI_V01
> +#define SBI_EXT_SET_TIMER              SBI_EXT_0_1_SET_TIMER
> +#define SBI_FID_SET_TIMER              0
> +#define SBI_EXT_SEND_IPI               SBI_EXT_0_1_SEND_IPI
> +#define SBI_FID_SEND_IPI               0
> +#define SBI_EXT_REMOTE_FENCE_I         SBI_EXT_0_1_REMOTE_FENCE_I
> +#define SBI_FID_REMOTE_FENCE_I         0
> +#define SBI_EXT_REMOTE_SFENCE_VMA      SBI_EXT_0_1_REMOTE_SFENCE_VMA
> +#define SBI_FID_REMOTE_SFENCE_VMA      0
> +#define SBI_EXT_REMOTE_SFENCE_VMA_ASID SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID
> +#define SBI_FID_REMOTE_SFENCE_VMA_ASID 0
> +#else
> +#define SBI_EXT_SET_TIMER              SBI_EXT_TIME
> +#define SBI_FID_SET_TIMER              SBI_EXT_TIME_SET_TIMER
> +#define SBI_EXT_SEND_IPI               SBI_EXT_IPI
> +#define SBI_FID_SEND_IPI               SBI_EXT_IPI_SEND_IPI
> +#define SBI_EXT_REMOTE_FENCE_I         SBI_EXT_RFENCE
> +#define SBI_FID_REMOTE_FENCE_I         SBI_EXT_RFENCE_REMOTE_FENCE_I
> +#define SBI_EXT_REMOTE_SFENCE_VMA      SBI_EXT_RFENCE
> +#define SBI_FID_REMOTE_SFENCE_VMA      SBI_EXT_RFENCE_REMOTE_SFENCE_VMA
> +#define SBI_EXT_REMOTE_SFENCE_VMA_ASID SBI_EXT_RFENCE
> +#define SBI_FID_REMOTE_SFENCE_VMA_ASID SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID
> +#endif
> +
>  #define SBI_SPEC_VERSION_DEFAULT       0x1
>  #define SBI_SPEC_VERSION_MAJOR_SHIFT   24
>  #define SBI_SPEC_VERSION_MAJOR_MASK    0x7f
> diff --git a/arch/riscv/lib/sbi.c b/arch/riscv/lib/sbi.c
> index 604a3a8..7bdf071 100644
> --- a/arch/riscv/lib/sbi.c
> +++ b/arch/riscv/lib/sbi.c
> @@ -97,10 +97,11 @@ void sbi_shutdown(void)
>  void sbi_set_timer(uint64_t stime_value)
>  {
>  #if __riscv_xlen == 32
> -       sbi_ecall(SBI_EXT_0_1_SET_TIMER, 0, stime_value,
> +       sbi_ecall(SBI_EXT_SET_TIMER, SBI_FID_SET_TIMER, stime_value,
>                   stime_value >> 32, 0, 0, 0, 0);
>  #else
> -       sbi_ecall(SBI_EXT_0_1_SET_TIMER, 0, stime_value, 0, 0, 0, 0, 0);
> +       sbi_ecall(SBI_EXT_SET_TIMER, SBI_FID_SET_TIMER, stime_value,
> +                 0, 0, 0, 0, 0);
>  #endif
>  }
>
> @@ -112,7 +113,7 @@ void sbi_set_timer(uint64_t stime_value)
>   */
>  void sbi_send_ipi(const unsigned long *hart_mask)
>  {
> -       sbi_ecall(SBI_EXT_0_1_SEND_IPI, 0, (unsigned long)hart_mask,
> +       sbi_ecall(SBI_EXT_SEND_IPI, SBI_FID_SEND_IPI, (unsigned long)hart_mask,
>                   0, 0, 0, 0, 0);
>  }
>
> @@ -124,8 +125,8 @@ void sbi_send_ipi(const unsigned long *hart_mask)
>   */
>  void sbi_remote_fence_i(const unsigned long *hart_mask)
>  {
> -       sbi_ecall(SBI_EXT_0_1_REMOTE_FENCE_I, 0, (unsigned long)hart_mask,
> -                 0, 0, 0, 0, 0);
> +       sbi_ecall(SBI_EXT_REMOTE_FENCE_I, SBI_FID_REMOTE_FENCE_I,
> +                 (unsigned long)hart_mask, 0, 0, 0, 0, 0);
>  }
>
>  /**
> @@ -141,7 +142,7 @@ void sbi_remote_sfence_vma(const unsigned long *hart_mask,
>                            unsigned long start,
>                            unsigned long size)
>  {
> -       sbi_ecall(SBI_EXT_0_1_REMOTE_SFENCE_VMA, 0,
> +       sbi_ecall(SBI_EXT_REMOTE_SFENCE_VMA, SBI_FID_REMOTE_SFENCE_VMA,
>                   (unsigned long)hart_mask, start, size, 0, 0, 0);
>  }
>
> @@ -161,7 +162,8 @@ void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask,
>                                 unsigned long size,
>                                 unsigned long asid)
>  {
> -       sbi_ecall(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, 0,
> +       sbi_ecall(SBI_EXT_REMOTE_SFENCE_VMA_ASID,
> +                 SBI_FID_REMOTE_SFENCE_VMA_ASID,
>                   (unsigned long)hart_mask, start, size, asid, 0, 0);
>  }
>
This is incorrect. IPI and SFENCE extension in SBI v0.2 accepts hart
mask as a value compared to a pointer to virtual address in SBI v0.1.
Maybe we should move this code to SBI_V01 given that SMP will be
enabled only for M-mode or  SBI_V01 as per your latest patch ?

> --
> 2.7.4
>
diff mbox series

Patch

diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
index c65104f..3595ee8 100644
--- a/arch/riscv/include/asm/sbi.h
+++ b/arch/riscv/include/asm/sbi.h
@@ -53,6 +53,30 @@  enum sbi_ext_rfence_fid {
 	SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID,
 };
 
+#ifdef CONFIG_SBI_V01
+#define SBI_EXT_SET_TIMER		SBI_EXT_0_1_SET_TIMER
+#define SBI_FID_SET_TIMER		0
+#define SBI_EXT_SEND_IPI		SBI_EXT_0_1_SEND_IPI
+#define SBI_FID_SEND_IPI		0
+#define SBI_EXT_REMOTE_FENCE_I		SBI_EXT_0_1_REMOTE_FENCE_I
+#define SBI_FID_REMOTE_FENCE_I		0
+#define SBI_EXT_REMOTE_SFENCE_VMA	SBI_EXT_0_1_REMOTE_SFENCE_VMA
+#define SBI_FID_REMOTE_SFENCE_VMA	0
+#define SBI_EXT_REMOTE_SFENCE_VMA_ASID	SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID
+#define SBI_FID_REMOTE_SFENCE_VMA_ASID	0
+#else
+#define SBI_EXT_SET_TIMER		SBI_EXT_TIME
+#define SBI_FID_SET_TIMER		SBI_EXT_TIME_SET_TIMER
+#define SBI_EXT_SEND_IPI		SBI_EXT_IPI
+#define SBI_FID_SEND_IPI		SBI_EXT_IPI_SEND_IPI
+#define SBI_EXT_REMOTE_FENCE_I		SBI_EXT_RFENCE
+#define SBI_FID_REMOTE_FENCE_I		SBI_EXT_RFENCE_REMOTE_FENCE_I
+#define SBI_EXT_REMOTE_SFENCE_VMA	SBI_EXT_RFENCE
+#define SBI_FID_REMOTE_SFENCE_VMA	SBI_EXT_RFENCE_REMOTE_SFENCE_VMA
+#define SBI_EXT_REMOTE_SFENCE_VMA_ASID	SBI_EXT_RFENCE
+#define SBI_FID_REMOTE_SFENCE_VMA_ASID	SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID
+#endif
+
 #define SBI_SPEC_VERSION_DEFAULT	0x1
 #define SBI_SPEC_VERSION_MAJOR_SHIFT	24
 #define SBI_SPEC_VERSION_MAJOR_MASK	0x7f
diff --git a/arch/riscv/lib/sbi.c b/arch/riscv/lib/sbi.c
index 604a3a8..7bdf071 100644
--- a/arch/riscv/lib/sbi.c
+++ b/arch/riscv/lib/sbi.c
@@ -97,10 +97,11 @@  void sbi_shutdown(void)
 void sbi_set_timer(uint64_t stime_value)
 {
 #if __riscv_xlen == 32
-	sbi_ecall(SBI_EXT_0_1_SET_TIMER, 0, stime_value,
+	sbi_ecall(SBI_EXT_SET_TIMER, SBI_FID_SET_TIMER, stime_value,
 		  stime_value >> 32, 0, 0, 0, 0);
 #else
-	sbi_ecall(SBI_EXT_0_1_SET_TIMER, 0, stime_value, 0, 0, 0, 0, 0);
+	sbi_ecall(SBI_EXT_SET_TIMER, SBI_FID_SET_TIMER, stime_value,
+		  0, 0, 0, 0, 0);
 #endif
 }
 
@@ -112,7 +113,7 @@  void sbi_set_timer(uint64_t stime_value)
  */
 void sbi_send_ipi(const unsigned long *hart_mask)
 {
-	sbi_ecall(SBI_EXT_0_1_SEND_IPI, 0, (unsigned long)hart_mask,
+	sbi_ecall(SBI_EXT_SEND_IPI, SBI_FID_SEND_IPI, (unsigned long)hart_mask,
 		  0, 0, 0, 0, 0);
 }
 
@@ -124,8 +125,8 @@  void sbi_send_ipi(const unsigned long *hart_mask)
  */
 void sbi_remote_fence_i(const unsigned long *hart_mask)
 {
-	sbi_ecall(SBI_EXT_0_1_REMOTE_FENCE_I, 0, (unsigned long)hart_mask,
-		  0, 0, 0, 0, 0);
+	sbi_ecall(SBI_EXT_REMOTE_FENCE_I, SBI_FID_REMOTE_FENCE_I,
+		  (unsigned long)hart_mask, 0, 0, 0, 0, 0);
 }
 
 /**
@@ -141,7 +142,7 @@  void sbi_remote_sfence_vma(const unsigned long *hart_mask,
 			   unsigned long start,
 			   unsigned long size)
 {
-	sbi_ecall(SBI_EXT_0_1_REMOTE_SFENCE_VMA, 0,
+	sbi_ecall(SBI_EXT_REMOTE_SFENCE_VMA, SBI_FID_REMOTE_SFENCE_VMA,
 		  (unsigned long)hart_mask, start, size, 0, 0, 0);
 }
 
@@ -161,7 +162,8 @@  void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask,
 				unsigned long size,
 				unsigned long asid)
 {
-	sbi_ecall(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, 0,
+	sbi_ecall(SBI_EXT_REMOTE_SFENCE_VMA_ASID,
+		  SBI_FID_REMOTE_SFENCE_VMA_ASID,
 		  (unsigned long)hart_mask, start, size, asid, 0, 0);
 }