Patchwork [v4,01/10] arm/tegra: initial device tree for tegra30

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Submitter Peter De Schrijver
Date Nov. 11, 2011, 11:22 a.m.
Message ID <1321010541-31337-2-git-send-email-pdeschrijver@nvidia.com>
Download mbox | patch
Permalink /patch/125147/
State New, archived
Headers show

Comments

Peter De Schrijver - Nov. 11, 2011, 11:22 a.m.
This patch adds the initial device tree for tegra30

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
---
 arch/arm/boot/dts/tegra30.dtsi |  127 ++++++++++++++++++++++++++++++++++++++++
 1 files changed, 127 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/boot/dts/tegra30.dtsi
Rob Herring - Nov. 12, 2011, 3:26 a.m.
On 11/11/2011 05:22 AM, Peter De Schrijver wrote:
> This patch adds the initial device tree for tegra30
> 
> Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
> ---
>  arch/arm/boot/dts/tegra30.dtsi |  127 ++++++++++++++++++++++++++++++++++++++++
>  1 files changed, 127 insertions(+), 0 deletions(-)
>  create mode 100644 arch/arm/boot/dts/tegra30.dtsi
> 
> diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
> new file mode 100644
> index 0000000..fabe243
> --- /dev/null
> +++ b/arch/arm/boot/dts/tegra30.dtsi
> @@ -0,0 +1,127 @@
> +/include/ "skeleton.dtsi"
> +
> +/ {
> +	compatible = "nvidia,tegra30";

Needs documentation.

> +	interrupt-parent = <&intc>;
> +
> +	intc: interrupt-controller@50041000 {
> +		compatible = "nvidia,tegra30-gic", "nvidia,tegra20-gic";
> +		interrupt-controller;
> +		#interrupt-cells = <1>;

Is the Tegra GIC really different from a standard A9 gic? You need to
update to use the gic binding. The cells should be 3 for example.

Rob

> +		reg = < 0x50041000 0x1000 >,
> +		      < 0x50040100 0x0100 >;
> +	};
> +
> +	i2c@7000c000 {
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +		compatible =  "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
> +		reg = <0x7000C000 0x100>;
> +		interrupts = < 70 >;
> +	};
> +
> +	i2c@7000c400 {
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +		compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
> +		reg = <0x7000C400 0x100>;
> +		interrupts = < 116 >;
> +	};
> +
> +	i2c@7000c500 {
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +		compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
> +		reg = <0x7000C500 0x100>;
> +		interrupts = < 124 >;
> +	};
> +
> +	i2c@7000c700 {
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +		compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
> +		reg = <0x7000c700 0x100>;
> +		interrupts = < 152 >;
> +	};
> +
> +	i2c@7000d000 {
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +		compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
> +		reg = <0x7000D000 0x100>;
> +		interrupts = < 85 >;
> +	};
> +
> +	gpio: gpio@6000d000 {
> +		compatible = "nvidia,tegra30-gpio", "nvidia,tegra20-gpio";
> +		reg = < 0x6000d000 0x1000 >;
> +		interrupts = < 64 65 66 67 87 119 121 >;
> +		#gpio-cells = <2>;
> +		gpio-controller;
> +	};
> +
> +	serial@70006000 {
> +		compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
> +		reg = <0x70006000 0x40>;
> +		reg-shift = <2>;
> +		interrupts = < 68 >;
> +	};
> +
> +	serial@70006040 {
> +		compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
> +		reg = <0x70006040 0x40>;
> +		reg-shift = <2>;
> +		interrupts = < 69 >;
> +	};
> +
> +	serial@70006200 {
> +		compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
> +		reg = <0x70006200 0x100>;
> +		reg-shift = <2>;
> +		interrupts = < 78 >;
> +	};
> +
> +	serial@70006300 {
> +		compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
> +		reg = <0x70006300 0x100>;
> +		reg-shift = <2>;
> +		interrupts = < 122 >;
> +	};
> +
> +	serial@70006400 {
> +		compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
> +		reg = <0x70006400 0x100>;
> +		reg-shift = <2>;
> +		interrupts = < 123 >;
> +	};
> +
> +	sdhci@78000000 {
> +		compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
> +		reg = <0x78000000 0x200>;
> +		interrupts = < 46 >;
> +	};
> +
> +	sdhci@78000200 {
> +		compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
> +		reg = <0x78000200 0x200>;
> +		interrupts = < 47 >;
> +	};
> +
> +	sdhci@78000400 {
> +		compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
> +		reg = <0x78000400 0x200>;
> +		interrupts = < 51 >;
> +	};
> +
> +	sdhci@78000600 {
> +		compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
> +		reg = <0x78000600 0x200>;
> +		interrupts = < 63 >;
> +	};
> +
> +	pinmux: pinmux@70000000 {
> +		compatible = "nvidia,tegra30-pinmux";
> +		reg = < 0x70000868 0xd0     /* Pad control registers */
> +			0x70003000 0x3e0 >; /* Mux registers */
> +	};
> +};

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Peter De Schrijver - Nov. 14, 2011, 3:25 p.m.
On Sat, Nov 12, 2011 at 04:26:30AM +0100, Rob Herring wrote:
> On 11/11/2011 05:22 AM, Peter De Schrijver wrote:
> > This patch adds the initial device tree for tegra30
> > 
> > Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
> > ---
> >  arch/arm/boot/dts/tegra30.dtsi |  127 ++++++++++++++++++++++++++++++++++++++++
> >  1 files changed, 127 insertions(+), 0 deletions(-)
> >  create mode 100644 arch/arm/boot/dts/tegra30.dtsi
> > 
> > diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
> > new file mode 100644
> > index 0000000..fabe243
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/tegra30.dtsi
> > @@ -0,0 +1,127 @@
> > +/include/ "skeleton.dtsi"
> > +
> > +/ {
> > +	compatible = "nvidia,tegra30";
> 
> Needs documentation.
> 
> > +	interrupt-parent = <&intc>;
> > +
> > +	intc: interrupt-controller@50041000 {
> > +		compatible = "nvidia,tegra30-gic", "nvidia,tegra20-gic";
> > +		interrupt-controller;
> > +		#interrupt-cells = <1>;
> 
> Is the Tegra GIC really different from a standard A9 gic? You need to
> update to use the gic binding. The cells should be 3 for example.

It has an extra 'legacy' interrupt controller like tegra20 has. This is used
when waking up the CPU from power off mode.

Cheers,

Peter.
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Rob Herring - Nov. 14, 2011, 3:41 p.m.
On 11/14/2011 09:25 AM, Peter De Schrijver wrote:
> On Sat, Nov 12, 2011 at 04:26:30AM +0100, Rob Herring wrote:
>> On 11/11/2011 05:22 AM, Peter De Schrijver wrote:
>>> This patch adds the initial device tree for tegra30
>>>
>>> Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
>>> ---
>>>  arch/arm/boot/dts/tegra30.dtsi |  127 ++++++++++++++++++++++++++++++++++++++++
>>>  1 files changed, 127 insertions(+), 0 deletions(-)
>>>  create mode 100644 arch/arm/boot/dts/tegra30.dtsi
>>>
>>> diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
>>> new file mode 100644
>>> index 0000000..fabe243
>>> --- /dev/null
>>> +++ b/arch/arm/boot/dts/tegra30.dtsi
>>> @@ -0,0 +1,127 @@
>>> +/include/ "skeleton.dtsi"
>>> +
>>> +/ {
>>> +	compatible = "nvidia,tegra30";
>>
>> Needs documentation.
>>
>>> +	interrupt-parent = <&intc>;
>>> +
>>> +	intc: interrupt-controller@50041000 {
>>> +		compatible = "nvidia,tegra30-gic", "nvidia,tegra20-gic";
>>> +		interrupt-controller;
>>> +		#interrupt-cells = <1>;
>>
>> Is the Tegra GIC really different from a standard A9 gic? You need to
>> update to use the gic binding. The cells should be 3 for example.
> 
> It has an extra 'legacy' interrupt controller like tegra20 has. This is used
> when waking up the CPU from power off mode.

Although that is probably not part of the GIC h/w (i.e. at a different
address) and should be described in the dts separately. That doesn't
change the GIC binding or the fact that you are using
arch/arm/common/gic.c though. Whether you have a different compatible
string or not is not really the issue. That can already be supported if
necessary. The issue is you are not using the existing GIC binding as a
starting point and that has implications on every node using a GIC
interrupt.

Rob


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Peter De Schrijver - Nov. 14, 2011, 4:06 p.m.
On Mon, Nov 14, 2011 at 04:41:13PM +0100, Rob Herring wrote:
> On 11/14/2011 09:25 AM, Peter De Schrijver wrote:
> > On Sat, Nov 12, 2011 at 04:26:30AM +0100, Rob Herring wrote:
> >> On 11/11/2011 05:22 AM, Peter De Schrijver wrote:
> >>> This patch adds the initial device tree for tegra30
> >>>
> >>> Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
> >>> ---
> >>>  arch/arm/boot/dts/tegra30.dtsi |  127 ++++++++++++++++++++++++++++++++++++++++
> >>>  1 files changed, 127 insertions(+), 0 deletions(-)
> >>>  create mode 100644 arch/arm/boot/dts/tegra30.dtsi
> >>>
> >>> diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
> >>> new file mode 100644
> >>> index 0000000..fabe243
> >>> --- /dev/null
> >>> +++ b/arch/arm/boot/dts/tegra30.dtsi
> >>> @@ -0,0 +1,127 @@
> >>> +/include/ "skeleton.dtsi"
> >>> +
> >>> +/ {
> >>> +	compatible = "nvidia,tegra30";
> >>
> >> Needs documentation.
> >>
> >>> +	interrupt-parent = <&intc>;
> >>> +
> >>> +	intc: interrupt-controller@50041000 {
> >>> +		compatible = "nvidia,tegra30-gic", "nvidia,tegra20-gic";
> >>> +		interrupt-controller;
> >>> +		#interrupt-cells = <1>;
> >>
> >> Is the Tegra GIC really different from a standard A9 gic? You need to
> >> update to use the gic binding. The cells should be 3 for example.
> > 
> > It has an extra 'legacy' interrupt controller like tegra20 has. This is used
> > when waking up the CPU from power off mode.
> 
> Although that is probably not part of the GIC h/w (i.e. at a different
> address) and should be described in the dts separately. That doesn't
> change the GIC binding or the fact that you are using
> arch/arm/common/gic.c though. Whether you have a different compatible
> string or not is not really the issue. That can already be supported if
> necessary. The issue is you are not using the existing GIC binding as a
> starting point and that has implications on every node using a GIC
> interrupt.
> 

The GIC is the same as the one used on tegra20. So I copied the binding from
tegra20.dtsi. Is that one wrong too then?

Cheers,

Peter.
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Stephen Warren - Nov. 14, 2011, 4:20 p.m.
Peter De Schrijver wrote at Monday, November 14, 2011 9:07 AM:
> On Mon, Nov 14, 2011 at 04:41:13PM +0100, Rob Herring wrote:
> > On 11/14/2011 09:25 AM, Peter De Schrijver wrote:
> > > On Sat, Nov 12, 2011 at 04:26:30AM +0100, Rob Herring wrote:
> > >> On 11/11/2011 05:22 AM, Peter De Schrijver wrote:
> > >>> This patch adds the initial device tree for tegra30
...
> > >>> +	interrupt-parent = <&intc>;
> > >>> +
> > >>> +	intc: interrupt-controller@50041000 {
> > >>> +		compatible = "nvidia,tegra30-gic", "nvidia,tegra20-gic";
> > >>> +		interrupt-controller;
> > >>> +		#interrupt-cells = <1>;
> > >>
> > >> Is the Tegra GIC really different from a standard A9 gic? You need to
> > >> update to use the gic binding. The cells should be 3 for example.
> > >
> > > It has an extra 'legacy' interrupt controller like tegra20 has. This is used
> > > when waking up the CPU from power off mode.
> >
> > Although that is probably not part of the GIC h/w (i.e. at a different
> > address) and should be described in the dts separately. That doesn't
> > change the GIC binding or the fact that you are using
> > arch/arm/common/gic.c though. Whether you have a different compatible
> > string or not is not really the issue. That can already be supported if
> > necessary. The issue is you are not using the existing GIC binding as a
> > starting point and that has implications on every node using a GIC
> > interrupt.
> >
> 
> The GIC is the same as the one used on tegra20. So I copied the binding from
> tegra20.dtsi. Is that one wrong too then?

The existing Tegra20 .dtsi file doesn't use the new GIC bindings yet
either, which as Peter points out is where he copied the GIC node from.
My suggestion is that we merge the Tegra30 .dtsi as shown above, and then
do a single pass to convert both tegra20.dtsi and tegra30.dtsi over to the
new GIC binding, to prevent blocking the merge of tegra30.dtsi on the GIC
binding rework. Does that sound fair?
Rob Herring - Nov. 14, 2011, 4:49 p.m.
On 11/14/2011 10:20 AM, Stephen Warren wrote:
> Peter De Schrijver wrote at Monday, November 14, 2011 9:07 AM:
>> On Mon, Nov 14, 2011 at 04:41:13PM +0100, Rob Herring wrote:
>>> On 11/14/2011 09:25 AM, Peter De Schrijver wrote:
>>>> On Sat, Nov 12, 2011 at 04:26:30AM +0100, Rob Herring wrote:
>>>>> On 11/11/2011 05:22 AM, Peter De Schrijver wrote:
>>>>>> This patch adds the initial device tree for tegra30
> ...
>>>>>> +	interrupt-parent = <&intc>;
>>>>>> +
>>>>>> +	intc: interrupt-controller@50041000 {
>>>>>> +		compatible = "nvidia,tegra30-gic", "nvidia,tegra20-gic";
>>>>>> +		interrupt-controller;
>>>>>> +		#interrupt-cells = <1>;
>>>>>
>>>>> Is the Tegra GIC really different from a standard A9 gic? You need to
>>>>> update to use the gic binding. The cells should be 3 for example.
>>>>
>>>> It has an extra 'legacy' interrupt controller like tegra20 has. This is used
>>>> when waking up the CPU from power off mode.
>>>
>>> Although that is probably not part of the GIC h/w (i.e. at a different
>>> address) and should be described in the dts separately. That doesn't
>>> change the GIC binding or the fact that you are using
>>> arch/arm/common/gic.c though. Whether you have a different compatible
>>> string or not is not really the issue. That can already be supported if
>>> necessary. The issue is you are not using the existing GIC binding as a
>>> starting point and that has implications on every node using a GIC
>>> interrupt.
>>>
>>
>> The GIC is the same as the one used on tegra20. So I copied the binding from
>> tegra20.dtsi. Is that one wrong too then?
> 
> The existing Tegra20 .dtsi file doesn't use the new GIC bindings yet
> either, which as Peter points out is where he copied the GIC node from.
> My suggestion is that we merge the Tegra30 .dtsi as shown above, and then
> do a single pass to convert both tegra20.dtsi and tegra30.dtsi over to the
> new GIC binding, to prevent blocking the merge of tegra30.dtsi on the GIC
> binding rework. Does that sound fair?
> 

If the change was complex to address then I would agree, but it's not.
In fact, the code to enable GIC DT binding is shorter than the
additional copy of a wrong/incomplete/unused binding. I think it is
needless churn doing as you suggest.

Rob

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Patch

diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
new file mode 100644
index 0000000..fabe243
--- /dev/null
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -0,0 +1,127 @@ 
+/include/ "skeleton.dtsi"
+
+/ {
+	compatible = "nvidia,tegra30";
+	interrupt-parent = <&intc>;
+
+	intc: interrupt-controller@50041000 {
+		compatible = "nvidia,tegra30-gic", "nvidia,tegra20-gic";
+		interrupt-controller;
+		#interrupt-cells = <1>;
+		reg = < 0x50041000 0x1000 >,
+		      < 0x50040100 0x0100 >;
+	};
+
+	i2c@7000c000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible =  "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
+		reg = <0x7000C000 0x100>;
+		interrupts = < 70 >;
+	};
+
+	i2c@7000c400 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
+		reg = <0x7000C400 0x100>;
+		interrupts = < 116 >;
+	};
+
+	i2c@7000c500 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
+		reg = <0x7000C500 0x100>;
+		interrupts = < 124 >;
+	};
+
+	i2c@7000c700 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
+		reg = <0x7000c700 0x100>;
+		interrupts = < 152 >;
+	};
+
+	i2c@7000d000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
+		reg = <0x7000D000 0x100>;
+		interrupts = < 85 >;
+	};
+
+	gpio: gpio@6000d000 {
+		compatible = "nvidia,tegra30-gpio", "nvidia,tegra20-gpio";
+		reg = < 0x6000d000 0x1000 >;
+		interrupts = < 64 65 66 67 87 119 121 >;
+		#gpio-cells = <2>;
+		gpio-controller;
+	};
+
+	serial@70006000 {
+		compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
+		reg = <0x70006000 0x40>;
+		reg-shift = <2>;
+		interrupts = < 68 >;
+	};
+
+	serial@70006040 {
+		compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
+		reg = <0x70006040 0x40>;
+		reg-shift = <2>;
+		interrupts = < 69 >;
+	};
+
+	serial@70006200 {
+		compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
+		reg = <0x70006200 0x100>;
+		reg-shift = <2>;
+		interrupts = < 78 >;
+	};
+
+	serial@70006300 {
+		compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
+		reg = <0x70006300 0x100>;
+		reg-shift = <2>;
+		interrupts = < 122 >;
+	};
+
+	serial@70006400 {
+		compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
+		reg = <0x70006400 0x100>;
+		reg-shift = <2>;
+		interrupts = < 123 >;
+	};
+
+	sdhci@78000000 {
+		compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
+		reg = <0x78000000 0x200>;
+		interrupts = < 46 >;
+	};
+
+	sdhci@78000200 {
+		compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
+		reg = <0x78000200 0x200>;
+		interrupts = < 47 >;
+	};
+
+	sdhci@78000400 {
+		compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
+		reg = <0x78000400 0x200>;
+		interrupts = < 51 >;
+	};
+
+	sdhci@78000600 {
+		compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
+		reg = <0x78000600 0x200>;
+		interrupts = < 63 >;
+	};
+
+	pinmux: pinmux@70000000 {
+		compatible = "nvidia,tegra30-pinmux";
+		reg = < 0x70000868 0xd0     /* Pad control registers */
+			0x70003000 0x3e0 >; /* Mux registers */
+	};
+};