From patchwork Thu Nov 10 21:56:50 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anton staaf X-Patchwork-Id: 125006 X-Patchwork-Delegate: afleming@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 4DF33B6F9B for ; Fri, 11 Nov 2011 09:04:02 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 7581E28B5D; Thu, 10 Nov 2011 23:03:59 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Xt0FJDuvUEFT; Thu, 10 Nov 2011 23:03:59 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id CF20128B60; Thu, 10 Nov 2011 23:03:56 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 91C2C28B60 for ; Thu, 10 Nov 2011 23:03:54 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id yYf4laanpsal for ; Thu, 10 Nov 2011 23:03:53 +0100 (CET) X-Greylist: delayed 402 seconds by postgrey-1.27 at theia; Thu, 10 Nov 2011 23:03:51 CET X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-ww0-f74.google.com (mail-ww0-f74.google.com [74.125.82.74]) by theia.denx.de (Postfix) with ESMTPS id 50A8628B5D for ; Thu, 10 Nov 2011 23:03:51 +0100 (CET) Received: by wwe5 with SMTP id 5so8058wwe.3 for ; Thu, 10 Nov 2011 14:03:51 -0800 (PST) Received: by 10.14.19.9 with SMTP id m9mr557935eem.8.1320962226561; Thu, 10 Nov 2011 13:57:06 -0800 (PST) Received: by 10.14.19.9 with SMTP id m9mr557909eem.8.1320962226308; Thu, 10 Nov 2011 13:57:06 -0800 (PST) Received: from hpza10.eem.corp.google.com ([74.125.121.33]) by gmr-mx.google.com with ESMTPS id i11si5446982eea.0.2011.11.10.13.57.06 (version=TLSv1/SSLv3 cipher=AES128-SHA); Thu, 10 Nov 2011 13:57:06 -0800 (PST) Received: from wpaz1.hot.corp.google.com (wpaz1.hot.corp.google.com [172.24.198.65]) by hpza10.eem.corp.google.com (Postfix) with ESMTPS id 0A09420004E; Thu, 10 Nov 2011 13:57:05 -0800 (PST) Received: from servo.mtv.corp.google.com (servo.mtv.corp.google.com [172.22.72.56]) by wpaz1.hot.corp.google.com with ESMTP id pAALv3br027416; Thu, 10 Nov 2011 13:57:03 -0800 Received: by servo.mtv.corp.google.com (Postfix, from userid 99248) id 2B8D64A18F; Thu, 10 Nov 2011 13:57:03 -0800 (PST) From: Anton Staaf To: u-boot@lists.denx.de Date: Thu, 10 Nov 2011 13:56:50 -0800 Message-Id: <1320962212-11789-3-git-send-email-robotboy@chromium.org> X-Mailer: git-send-email 1.7.3.1 In-Reply-To: <1320962212-11789-1-git-send-email-robotboy@chromium.org> References: <1320962212-11789-1-git-send-email-robotboy@chromium.org> X-System-Of-Record: true Cc: Andy Fleming , Anton Staaf , Tom Warren Subject: [U-Boot] [PATCH v3 2/4] Tegra2: mmc: Support DMA restarts at buffer boundaries X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Currently if a DMA buffer straddles a buffer alignment boundary (512KiB) then the DMA engine will pause and generate a DMA interrupt. Since the DMA interrupt is not enabled it will hang the MMC driver. This patch adds support for restarting the DMA transfer. The SYSTEM_ADDRESS register contains the next address that would have been read/written when a boundary is hit. So we can read that and write it back. The write triggers the resumption of the transfer. Signed-off-by: Anton Staaf Cc: Andy Fleming Cc: Tom Warren Cc: Stephen Warren Cc: Albert Aribaud --- drivers/mmc/tegra2_mmc.c | 13 +++++++++++-- 1 files changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/tegra2_mmc.c b/drivers/mmc/tegra2_mmc.c index 2bea07d..159cef1 100644 --- a/drivers/mmc/tegra2_mmc.c +++ b/drivers/mmc/tegra2_mmc.c @@ -270,9 +270,16 @@ static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, __func__, mask); return -1; } else if (mask & TEGRA_MMC_NORINTSTS_DMA_INTERRUPT) { - /* DMA Interrupt */ + /* + * DMA Interrupt, restart the transfer where + * it was interrupted. + */ + unsigned int address = readl(&host->reg->sysad); + debug("DMA end\n"); - break; + writel(TEGRA_MMC_NORINTSTS_DMA_INTERRUPT, + &host->reg->norintsts); + writel(address, &host->reg->sysad); } else if (mask & TEGRA_MMC_NORINTSTS_XFER_COMPLETE) { /* Transfer Complete */ debug("r/w is done\n"); @@ -419,6 +426,7 @@ static int mmc_core_init(struct mmc *mmc) * NORMAL Interrupt Status Enable Register init * [5] ENSTABUFRDRDY : Buffer Read Ready Status Enable * [4] ENSTABUFWTRDY : Buffer write Ready Status Enable + * [3] ENSTADMAINT : DMA boundary interrupt * [1] ENSTASTANSCMPLT : Transfre Complete Status Enable * [0] ENSTACMDCMPLT : Command Complete Status Enable */ @@ -426,6 +434,7 @@ static int mmc_core_init(struct mmc *mmc) mask &= ~(0xffff); mask |= (TEGRA_MMC_NORINTSTSEN_CMD_COMPLETE | TEGRA_MMC_NORINTSTSEN_XFER_COMPLETE | + TEGRA_MMC_NORINTSTSEN_DMA_INTERRUPT | TEGRA_MMC_NORINTSTSEN_BUFFER_WRITE_READY | TEGRA_MMC_NORINTSTSEN_BUFFER_READ_READY); writel(mask, &host->reg->norintstsen);