Patchwork [1/2] arm-linux-user: fix elfload.c's AT_HWCAP to reflect cpu features.

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Submitter Benoit Canet
Date Nov. 9, 2011, 5:32 p.m.
Message ID <1320859979-10766-2-git-send-email-benoit.canet@gmail.com>
Download mbox | patch
Permalink /patch/124633/
State New
Headers show

Comments

Benoit Canet - Nov. 9, 2011, 5:32 p.m.
The cpu capabilities passed by the elf loader in AT_HWCAP were
a constant.
Make AT_HWCAP reflect the emulated cpu features in order to give
correct clues to eglibc.

Fix :  [Bug 887516] [NEW] VFP support reported for the PXA270

Signed-off-by: Benoit Canet <benoit.canet@gmail.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
---
 linux-user/elfload.c |   46 ++++++++++++++++++++++++++++++++++++++++++----
 1 files changed, 42 insertions(+), 4 deletions(-)
Benoit Canet - March 27, 2012, 1:32 p.m.
Gentle ping,
Still apply fine and compile ok.

On Wed, Nov 9, 2011 at 6:32 PM, Benoît Canet <benoit.canet@gmail.com> wrote:

> The cpu capabilities passed by the elf loader in AT_HWCAP were
> a constant.
> Make AT_HWCAP reflect the emulated cpu features in order to give
> correct clues to eglibc.
>
> Fix :  [Bug 887516] [NEW] VFP support reported for the PXA270
>
> Signed-off-by: Benoit Canet <benoit.canet@gmail.com>
> Reviewed-by: Andreas Färber <afaerber@suse.de>
> ---
>  linux-user/elfload.c |   46 ++++++++++++++++++++++++++++++++++++++++++----
>  1 files changed, 42 insertions(+), 4 deletions(-)
>
> diff --git a/linux-user/elfload.c b/linux-user/elfload.c
> index a413976..1c30c23 100644
> --- a/linux-user/elfload.c
> +++ b/linux-user/elfload.c
> @@ -330,6 +330,10 @@ enum
>     ARM_HWCAP_ARM_NEON      = 1 << 11,
>     ARM_HWCAP_ARM_VFPv3     = 1 << 12,
>     ARM_HWCAP_ARM_VFPv3D16  = 1 << 13,
> +    ARM_HWCAP_ARM_TLS       = 1 << 14,
> +    ARM_HWCAP_ARM_VFPv4     = 1 << 15,
> +    ARM_HWCAP_ARM_IDIVA     = 1 << 16,
> +    ARM_HWCAP_ARM_IDIVT     = 1 << 17,
>  };
>
>  #define TARGET_HAS_GUEST_VALIDATE_BASE
> @@ -375,10 +379,44 @@ bool guest_validate_base(unsigned long guest_base)
>     return 1; /* All good */
>  }
>
> -#define ELF_HWCAP (ARM_HWCAP_ARM_SWP | ARM_HWCAP_ARM_HALF               \
> -                   | ARM_HWCAP_ARM_THUMB | ARM_HWCAP_ARM_FAST_MULT      \
> -                   | ARM_HWCAP_ARM_FPA | ARM_HWCAP_ARM_VFP              \
> -                   | ARM_HWCAP_ARM_NEON | ARM_HWCAP_ARM_VFPv3 )
> +
> +#define ELF_HWCAP get_elf_hwcap()
> +
> +static uint32_t get_elf_hwcap(void)
> +{
> +    CPUState *e = thread_env;
> +    uint32_t hwcaps = 0;
> +
> +    hwcaps |= ARM_HWCAP_ARM_SWP;
> +    hwcaps |= ARM_HWCAP_ARM_HALF;
> +    hwcaps |= ARM_HWCAP_ARM_THUMB;
> +    hwcaps |= ARM_HWCAP_ARM_FAST_MULT;
> +
> +    /* probe for the extra features */
> +#define SET_HWCAP(feat, hwcap) do {     \
> +        if (arm_feature(e, feat)) {     \
> +            hwcaps |= hwcap;            \
> +        }                               \
> +    } while (0)
> +    SET_HWCAP(ARM_FEATURE_VFP, ARM_HWCAP_ARM_VFP);
> +    SET_HWCAP(ARM_FEATURE_IWMMXT, ARM_HWCAP_ARM_IWMMXT);
> +    SET_HWCAP(ARM_FEATURE_THUMB2EE, ARM_HWCAP_ARM_THUMBEE);
> +    SET_HWCAP(ARM_FEATURE_NEON, ARM_HWCAP_ARM_NEON);
> +    SET_HWCAP(ARM_FEATURE_VFP3, ARM_HWCAP_ARM_VFPv3);
> +
> +    /* Strictly should be ARM_FEATURE_V5TE but we don't distinguish
> +     * as all our v5 cores are v5TE at the moment
> +     */
> +    SET_HWCAP(ARM_FEATURE_V5, ARM_HWCAP_ARM_EDSP);
> +
> +    SET_HWCAP(ARM_FEATURE_V6K, ARM_HWCAP_ARM_TLS);
> +    SET_HWCAP(ARM_FEATURE_VFP4, ARM_HWCAP_ARM_VFPv4);
> +    SET_HWCAP(ARM_FEATURE_ARM_DIV, ARM_HWCAP_ARM_IDIVA);
> +    SET_HWCAP(ARM_FEATURE_THUMB_DIV, ARM_HWCAP_ARM_IDIVT);
> +#undef SET_HWCAP
> +
> +    return hwcaps;
> +}
>
>  #endif
>
> --
> 1.7.5.4
>
>

Patch

diff --git a/linux-user/elfload.c b/linux-user/elfload.c
index a413976..1c30c23 100644
--- a/linux-user/elfload.c
+++ b/linux-user/elfload.c
@@ -330,6 +330,10 @@  enum
     ARM_HWCAP_ARM_NEON      = 1 << 11,
     ARM_HWCAP_ARM_VFPv3     = 1 << 12,
     ARM_HWCAP_ARM_VFPv3D16  = 1 << 13,
+    ARM_HWCAP_ARM_TLS       = 1 << 14,
+    ARM_HWCAP_ARM_VFPv4     = 1 << 15,
+    ARM_HWCAP_ARM_IDIVA     = 1 << 16,
+    ARM_HWCAP_ARM_IDIVT     = 1 << 17,
 };
 
 #define TARGET_HAS_GUEST_VALIDATE_BASE
@@ -375,10 +379,44 @@  bool guest_validate_base(unsigned long guest_base)
     return 1; /* All good */
 }
 
-#define ELF_HWCAP (ARM_HWCAP_ARM_SWP | ARM_HWCAP_ARM_HALF               \
-                   | ARM_HWCAP_ARM_THUMB | ARM_HWCAP_ARM_FAST_MULT      \
-                   | ARM_HWCAP_ARM_FPA | ARM_HWCAP_ARM_VFP              \
-                   | ARM_HWCAP_ARM_NEON | ARM_HWCAP_ARM_VFPv3 )
+
+#define ELF_HWCAP get_elf_hwcap()
+
+static uint32_t get_elf_hwcap(void)
+{
+    CPUState *e = thread_env;
+    uint32_t hwcaps = 0;
+
+    hwcaps |= ARM_HWCAP_ARM_SWP;
+    hwcaps |= ARM_HWCAP_ARM_HALF;
+    hwcaps |= ARM_HWCAP_ARM_THUMB;
+    hwcaps |= ARM_HWCAP_ARM_FAST_MULT;
+
+    /* probe for the extra features */
+#define SET_HWCAP(feat, hwcap) do {     \
+        if (arm_feature(e, feat)) {     \
+            hwcaps |= hwcap;            \
+        }                               \
+    } while (0)
+    SET_HWCAP(ARM_FEATURE_VFP, ARM_HWCAP_ARM_VFP);
+    SET_HWCAP(ARM_FEATURE_IWMMXT, ARM_HWCAP_ARM_IWMMXT);
+    SET_HWCAP(ARM_FEATURE_THUMB2EE, ARM_HWCAP_ARM_THUMBEE);
+    SET_HWCAP(ARM_FEATURE_NEON, ARM_HWCAP_ARM_NEON);
+    SET_HWCAP(ARM_FEATURE_VFP3, ARM_HWCAP_ARM_VFPv3);
+
+    /* Strictly should be ARM_FEATURE_V5TE but we don't distinguish
+     * as all our v5 cores are v5TE at the moment
+     */
+    SET_HWCAP(ARM_FEATURE_V5, ARM_HWCAP_ARM_EDSP);
+
+    SET_HWCAP(ARM_FEATURE_V6K, ARM_HWCAP_ARM_TLS);
+    SET_HWCAP(ARM_FEATURE_VFP4, ARM_HWCAP_ARM_VFPv4);
+    SET_HWCAP(ARM_FEATURE_ARM_DIV, ARM_HWCAP_ARM_IDIVA);
+    SET_HWCAP(ARM_FEATURE_THUMB_DIV, ARM_HWCAP_ARM_IDIVT);
+#undef SET_HWCAP
+
+    return hwcaps;
+}
 
 #endif