From patchwork Wed Feb 26 10:17:51 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vaidyanathan Srinivasan X-Patchwork-Id: 1245754 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48SrPh3Js9z9sNg for ; Thu, 27 Feb 2020 22:42:32 +1100 (AEDT) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.vnet.ibm.com Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 48SrPg4ktMzDr0f for ; Thu, 27 Feb 2020 22:42:31 +1100 (AEDT) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=linux.vnet.ibm.com (client-ip=148.163.158.5; helo=mx0a-001b2d01.pphosted.com; envelope-from=svaidy@linux.vnet.ibm.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.vnet.ibm.com Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 48SBb23tZ5zDqJS for ; Wed, 26 Feb 2020 21:18:22 +1100 (AEDT) Received: from pps.filterd (m0098414.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 01QAALxj107233 for ; Wed, 26 Feb 2020 05:18:20 -0500 Received: from e06smtp04.uk.ibm.com (e06smtp04.uk.ibm.com [195.75.94.100]) by mx0b-001b2d01.pphosted.com with ESMTP id 2ydcng90vs-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Wed, 26 Feb 2020 05:18:19 -0500 Received: from localhost by e06smtp04.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Wed, 26 Feb 2020 10:18:15 -0000 Received: from d06av23.portsmouth.uk.ibm.com (d06av23.portsmouth.uk.ibm.com [9.149.105.59]) by b06avi18878370.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 01QAIEp742336608 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 26 Feb 2020 10:18:14 GMT Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 8100BA4051; Wed, 26 Feb 2020 10:18:14 +0000 (GMT) Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 76D4DA4055; Wed, 26 Feb 2020 10:18:13 +0000 (GMT) Received: from drishya.in.ibm.com (unknown [9.102.3.58]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 26 Feb 2020 10:18:13 +0000 (GMT) From: Vaidyanathan Srinivasan To: "Oliver O'Halloran" Date: Wed, 26 Feb 2020 15:47:51 +0530 X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200226101752.122998-1-svaidy@linux.vnet.ibm.com> References: <20200226101752.122998-1-svaidy@linux.vnet.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 20022610-0016-0000-0000-000002EA63F6 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 20022610-0017-0000-0000-0000334D92DA Message-Id: <20200226101752.122998-8-svaidy@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138, 18.0.572 definitions=2020-02-26_02:2020-02-26, 2020-02-26 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 phishscore=0 spamscore=0 suspectscore=0 impostorscore=0 clxscore=1015 mlxscore=0 bulkscore=0 malwarescore=0 priorityscore=1501 mlxlogscore=968 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2001150001 definitions=main-2002260077 X-Mailman-Approved-At: Thu, 27 Feb 2020 22:40:36 +1100 Subject: [Skiboot] [PATCH v4 7/8] cpu: Make cpu_get_core_index() return the fused core number X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: skiboot@lists.ozlabs.org, Michael Neuling Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" From: Benjamin Herrenschmidt cpu_get_core_index() currently uses pir_to_core_id() which returns an EC number always (ie, a normal core number) even in fused core mode. This is inconsistent with cpu_get_thread_index() which returns a thread within a fused core (0...7) on P9. So let's make things consistent and document it. Signed-off-by: Benjamin Herrenschmidt Signed-off-by: Michael Neuling --- core/chip.c | 13 +++++++++++++ core/cpu.c | 2 +- include/chip.h | 5 +++++ include/cpu.h | 6 ++++++ 4 files changed, 25 insertions(+), 1 deletion(-) diff --git a/core/chip.c b/core/chip.c index 3fa78b9d..0fea4713 100644 --- a/core/chip.c +++ b/core/chip.c @@ -34,6 +34,19 @@ uint32_t pir_to_core_id(uint32_t pir) assert(false); } +uint32_t pir_to_fused_core_id(uint32_t pir) +{ + if (proc_gen == proc_gen_p9) { + if (this_cpu()->is_fused_core) + return P9_PIR2FUSEDCOREID(pir); + else + return P9_PIR2COREID(pir); + } else if (proc_gen == proc_gen_p8) + return P8_PIR2COREID(pir); + else + assert(false); +} + uint32_t pir_to_thread_id(uint32_t pir) { if (proc_gen == proc_gen_p9) { diff --git a/core/cpu.c b/core/cpu.c index 98428dfb..53f4934d 100644 --- a/core/cpu.c +++ b/core/cpu.c @@ -866,7 +866,7 @@ struct cpu_thread *first_available_core_in_chip(u32 chip_id) uint32_t cpu_get_core_index(struct cpu_thread *cpu) { - return pir_to_core_id(cpu->pir); + return pir_to_fused_core_id(cpu->pir); } void cpu_remove_node(const struct cpu_thread *t) diff --git a/include/chip.h b/include/chip.h index a46e647d..a87ed36b 100644 --- a/include/chip.h +++ b/include/chip.h @@ -236,6 +236,11 @@ extern uint32_t pir_to_chip_id(uint32_t pir); extern uint32_t pir_to_core_id(uint32_t pir); extern uint32_t pir_to_thread_id(uint32_t pir); +/* In P9 fused core mode, this is the "fused" core ID, in + * normal core mode or P8, this is the same as pir_to_core_id + */ +extern uint32_t pir_to_fused_core_id(uint32_t pir); + extern struct proc_chip *next_chip(struct proc_chip *chip); #define for_each_chip(__c) for (__c=next_chip(NULL); __c; __c=next_chip(__c)) diff --git a/include/cpu.h b/include/cpu.h index 5f8682bd..c8cb7664 100644 --- a/include/cpu.h +++ b/include/cpu.h @@ -220,6 +220,12 @@ static inline __nomcount struct cpu_thread *this_cpu(void) return __this_cpu; } +/* + * Note: On POWER9 fused core, cpu_get_thread_index() and cpu_get_core_index() + * return respectively the thread number within a fused core (0..7) and + * the fused core number. If you want the EC (small core) number, you have + * to use the low level pir_to_core_id() and pir_to_thread_id(). + */ /* Get the thread # of a cpu within the core */ static inline uint32_t cpu_get_thread_index(struct cpu_thread *cpu) {