Patchwork [1/2] arm-linux-user: fix elfload.c's AT_HWCAP to reflect cpu features.

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Submitter Benoit Canet
Date Nov. 9, 2011, 3:02 p.m.
Message ID <1320850979-6620-2-git-send-email-benoit.canet@gmail.com>
Download mbox | patch
Permalink /patch/124571/
State New
Headers show

Comments

Benoit Canet - Nov. 9, 2011, 3:02 p.m.
The cpu capabilities passed by the elf loader in AT_HWCAP where
a constant.
Make AT_HWCAP reflect the emulated cpu features in order to give
correct clues to eglibc.

Fix :  [Bug 887516] [NEW] VFP support reported for the PXA270

Signed-off-by: Benoit Canet <benoit.canet@gmail.com>
---
 linux-user/elfload.c |   43 +++++++++++++++++++++++++++++++++++++++----
 1 files changed, 39 insertions(+), 4 deletions(-)
Andreas Färber - Nov. 9, 2011, 3:34 p.m.
Am 09.11.2011 16:02, schrieb Benoît Canet:
> The cpu capabilities passed by the elf loader in AT_HWCAP where

were

> a constant.
> Make AT_HWCAP reflect the emulated cpu features in order to give
> correct clues to eglibc.
> 
> Fix :  [Bug 887516] [NEW] VFP support reported for the PXA270
> 
> Signed-off-by: Benoit Canet <benoit.canet@gmail.com>
> ---
>  linux-user/elfload.c |   43 +++++++++++++++++++++++++++++++++++++++----
>  1 files changed, 39 insertions(+), 4 deletions(-)
> 
> diff --git a/linux-user/elfload.c b/linux-user/elfload.c
> index a413976..73c939b 100644
> --- a/linux-user/elfload.c
> +++ b/linux-user/elfload.c
> @@ -330,6 +330,10 @@ enum
>      ARM_HWCAP_ARM_NEON      = 1 << 11,
>      ARM_HWCAP_ARM_VFPv3     = 1 << 12,
>      ARM_HWCAP_ARM_VFPv3D16  = 1 << 13,
> +    ARM_HWCAP_ARM_TLS       = 1 << 14,
> +    ARM_HWCAP_ARM_VFPv4     = 1 << 15,
> +    ARM_HWCAP_ARM_IDIVA     = 1 << 16,
> +    ARM_HWCAP_ARM_IDIVT     = 1 << 17,
>  };
>  
>  #define TARGET_HAS_GUEST_VALIDATE_BASE
> @@ -375,10 +379,41 @@ bool guest_validate_base(unsigned long guest_base)
>      return 1; /* All good */
>  }
>  
> -#define ELF_HWCAP (ARM_HWCAP_ARM_SWP | ARM_HWCAP_ARM_HALF               \
> -                   | ARM_HWCAP_ARM_THUMB | ARM_HWCAP_ARM_FAST_MULT      \
> -                   | ARM_HWCAP_ARM_FPA | ARM_HWCAP_ARM_VFP              \
> -                   | ARM_HWCAP_ARM_NEON | ARM_HWCAP_ARM_VFPv3 )
> +
> +#define ELF_HWCAP get_elf_hwcap()
> +
> +static uint32_t get_elf_hwcap(void)
> +{
> +    CPUState *e = thread_env;
> +    uint32_t hwcaps = 0;
> +
> +    hwcaps |= ARM_HWCAP_ARM_SWP;
> +    hwcaps |= ARM_HWCAP_ARM_HALF;
> +    hwcaps |= ARM_HWCAP_ARM_THUMB;
> +    hwcaps |= ARM_HWCAP_ARM_FAST_MULT;
> +
> +    /* probe for the extra features */
> +#define SET_HWCAP(feat, hwcap) \
> +    do {if (arm_feature(e, feat)) { hwcaps |= hwcap; } } while (0)

Small nit: I notice there's a space missing after do {.
I wonder if Coding Style applies to macros, too. In that case this
should be five lines.

> +    SET_HWCAP(ARM_FEATURE_VFP, ARM_HWCAP_ARM_VFP);
> +    SET_HWCAP(ARM_FEATURE_IWMMXT, ARM_HWCAP_ARM_IWMMXT);
> +    SET_HWCAP(ARM_FEATURE_THUMB2EE, ARM_HWCAP_ARM_THUMBEE);
> +    SET_HWCAP(ARM_FEATURE_NEON, ARM_HWCAP_ARM_NEON);
> +    SET_HWCAP(ARM_FEATURE_VFP3, ARM_HWCAP_ARM_VFPv3);
> +
> +    /* Strictly should be ARM_FEATURE_V5TE but we don't distinguish
> +     * as all our v5 cores are v5TE at the moment
> +     */
> +    SET_HWCAP(ARM_FEATURE_V5, ARM_HWCAP_ARM_EDSP);

Peter, usually I'd rather have these things fixed for real before they
get forgotten, but I take it this one's for 1.0 and a V5TE feature and
V5TE => V5 inference rule would better be saved for 1.1? (I had a series
adding inference for V7 => V6 etc. removing duplicated code, not sure if
I submitted that yet...?)

Andreas

> +    SET_HWCAP(ARM_FEATURE_V6K, ARM_HWCAP_ARM_TLS);
> +    SET_HWCAP(ARM_FEATURE_VFP4, ARM_HWCAP_ARM_VFPv4);
> +    SET_HWCAP(ARM_FEATURE_ARM_DIV, ARM_HWCAP_ARM_IDIVA);
> +    SET_HWCAP(ARM_FEATURE_THUMB_DIV, ARM_HWCAP_ARM_IDIVT);
> +#undef SET_HWCAP
> +
> +    return hwcaps;
> +}
>  
>  #endif
>
Peter Maydell - Nov. 9, 2011, 3:48 p.m.
On 9 November 2011 15:34, Andreas Färber <afaerber@suse.de> wrote:
> Am 09.11.2011 16:02, schrieb Benoît Canet:
>> +#define SET_HWCAP(feat, hwcap) \
>> +    do {if (arm_feature(e, feat)) { hwcaps |= hwcap; } } while (0)
>
> Small nit: I notice there's a space missing after do {.
> I wonder if Coding Style applies to macros, too. In that case this
> should be five lines.

Personally I wouldn't make it five lines...

>> +    SET_HWCAP(ARM_FEATURE_VFP, ARM_HWCAP_ARM_VFP);
>> +    SET_HWCAP(ARM_FEATURE_IWMMXT, ARM_HWCAP_ARM_IWMMXT);
>> +    SET_HWCAP(ARM_FEATURE_THUMB2EE, ARM_HWCAP_ARM_THUMBEE);
>> +    SET_HWCAP(ARM_FEATURE_NEON, ARM_HWCAP_ARM_NEON);
>> +    SET_HWCAP(ARM_FEATURE_VFP3, ARM_HWCAP_ARM_VFPv3);
>> +
>> +    /* Strictly should be ARM_FEATURE_V5TE but we don't distinguish
>> +     * as all our v5 cores are v5TE at the moment
>> +     */
>> +    SET_HWCAP(ARM_FEATURE_V5, ARM_HWCAP_ARM_EDSP);
>
> Peter, usually I'd rather have these things fixed for real before they
> get forgotten, but I take it this one's for 1.0 and a V5TE feature and
> V5TE => V5 inference rule would better be saved for 1.1? (I had a series
> adding inference for V7 => V6 etc. removing duplicated code, not sure if
> I submitted that yet...?)

I wasn't planning to put this in for 1.0. (The only patch I have
that I do want to put in 1.0 is the omap_gpio one.)

I don't think I've seen a patch from you adding the v7->v6->...
inferences. I think it would be a good idea, though, ditto adding
V5TE (if you do then the ENABLE_ARCH_5TE macro in translate.c should
be updated).

-- PMM

Patch

diff --git a/linux-user/elfload.c b/linux-user/elfload.c
index a413976..73c939b 100644
--- a/linux-user/elfload.c
+++ b/linux-user/elfload.c
@@ -330,6 +330,10 @@  enum
     ARM_HWCAP_ARM_NEON      = 1 << 11,
     ARM_HWCAP_ARM_VFPv3     = 1 << 12,
     ARM_HWCAP_ARM_VFPv3D16  = 1 << 13,
+    ARM_HWCAP_ARM_TLS       = 1 << 14,
+    ARM_HWCAP_ARM_VFPv4     = 1 << 15,
+    ARM_HWCAP_ARM_IDIVA     = 1 << 16,
+    ARM_HWCAP_ARM_IDIVT     = 1 << 17,
 };
 
 #define TARGET_HAS_GUEST_VALIDATE_BASE
@@ -375,10 +379,41 @@  bool guest_validate_base(unsigned long guest_base)
     return 1; /* All good */
 }
 
-#define ELF_HWCAP (ARM_HWCAP_ARM_SWP | ARM_HWCAP_ARM_HALF               \
-                   | ARM_HWCAP_ARM_THUMB | ARM_HWCAP_ARM_FAST_MULT      \
-                   | ARM_HWCAP_ARM_FPA | ARM_HWCAP_ARM_VFP              \
-                   | ARM_HWCAP_ARM_NEON | ARM_HWCAP_ARM_VFPv3 )
+
+#define ELF_HWCAP get_elf_hwcap()
+
+static uint32_t get_elf_hwcap(void)
+{
+    CPUState *e = thread_env;
+    uint32_t hwcaps = 0;
+
+    hwcaps |= ARM_HWCAP_ARM_SWP;
+    hwcaps |= ARM_HWCAP_ARM_HALF;
+    hwcaps |= ARM_HWCAP_ARM_THUMB;
+    hwcaps |= ARM_HWCAP_ARM_FAST_MULT;
+
+    /* probe for the extra features */
+#define SET_HWCAP(feat, hwcap) \
+    do {if (arm_feature(e, feat)) { hwcaps |= hwcap; } } while (0)
+    SET_HWCAP(ARM_FEATURE_VFP, ARM_HWCAP_ARM_VFP);
+    SET_HWCAP(ARM_FEATURE_IWMMXT, ARM_HWCAP_ARM_IWMMXT);
+    SET_HWCAP(ARM_FEATURE_THUMB2EE, ARM_HWCAP_ARM_THUMBEE);
+    SET_HWCAP(ARM_FEATURE_NEON, ARM_HWCAP_ARM_NEON);
+    SET_HWCAP(ARM_FEATURE_VFP3, ARM_HWCAP_ARM_VFPv3);
+
+    /* Strictly should be ARM_FEATURE_V5TE but we don't distinguish
+     * as all our v5 cores are v5TE at the moment
+     */
+    SET_HWCAP(ARM_FEATURE_V5, ARM_HWCAP_ARM_EDSP);
+
+    SET_HWCAP(ARM_FEATURE_V6K, ARM_HWCAP_ARM_TLS);
+    SET_HWCAP(ARM_FEATURE_VFP4, ARM_HWCAP_ARM_VFPv4);
+    SET_HWCAP(ARM_FEATURE_ARM_DIV, ARM_HWCAP_ARM_IDIVA);
+    SET_HWCAP(ARM_FEATURE_THUMB_DIV, ARM_HWCAP_ARM_IDIVT);
+#undef SET_HWCAP
+
+    return hwcaps;
+}
 
 #endif