Patchwork [U-Boot,07/20] iMX28: Add SPI driver

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Submitter Marek Vasut
Date Nov. 9, 2011, 9:18 a.m.
Message ID <1320830307-4762-8-git-send-email-marek.vasut@gmail.com>
Download mbox | patch
Permalink /patch/124498/
State Awaiting Upstream
Delegated to: Stefano Babic
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Comments

Marek Vasut - Nov. 9, 2011, 9:18 a.m.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
---
 drivers/spi/Makefile  |    1 +
 drivers/spi/mxs_spi.c |  186 +++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 187 insertions(+), 0 deletions(-)
 create mode 100644 drivers/spi/mxs_spi.c
Stefano Babic - Nov. 10, 2011, 1:11 p.m.
On 11/09/2011 10:18 AM, Marek Vasut wrote:
> Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
> Cc: Stefano Babic <sbabic@denx.de>
> Cc: Wolfgang Denk <wd@denx.de>
> Cc: Detlev Zundel <dzu@denx.de>
> ---
>  drivers/spi/Makefile  |    1 +
>  drivers/spi/mxs_spi.c |  186 +++++++++++++++++++++++++++++++++++++++++++++++++
>  2 files changed, 187 insertions(+), 0 deletions(-)
>  create mode 100644 drivers/spi/mxs_spi.c
> 
> diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
> index 84ad6fa..6f389f0 100644
> --- a/drivers/spi/Makefile
> +++ b/drivers/spi/Makefile
> @@ -37,6 +37,7 @@ COBJS-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o
>  COBJS-$(CONFIG_MPC52XX_SPI) += mpc52xx_spi.o
>  COBJS-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o
>  COBJS-$(CONFIG_MXC_SPI) += mxc_spi.o
> +COBJS-$(CONFIG_MXS_SPI) += mxs_spi.o
>  COBJS-$(CONFIG_OC_TINY_SPI) += oc_tiny_spi.o
>  COBJS-$(CONFIG_OMAP3_SPI) += omap3_spi.o
>  COBJS-$(CONFIG_SOFT_SPI) += soft_spi.o
> diff --git a/drivers/spi/mxs_spi.c b/drivers/spi/mxs_spi.c
> new file mode 100644
> index 0000000..4c27fef
> --- /dev/null
> +++ b/drivers/spi/mxs_spi.c
> @@ -0,0 +1,186 @@
> +/*
> + * Freescale i.MX28 SPI driver
> + *
> + * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
> + * on behalf of DENX Software Engineering GmbH
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + *
> + * NOTE: This driver only supports the SPI-controller chipselects,
> + *       GPIO driven chipselects are not supported.
> + */
> +
> +#include <common.h>
> +#include <malloc.h>
> +#include <spi.h>
> +#include <asm/errno.h>
> +#include <asm/io.h>
> +#include <asm/arch/clock.h>
> +#include <asm/arch/imx-regs.h>
> +#include <asm/arch/sys_proto.h>
> +
> +#define	MXS_SPI_MAX_TIMEOUT	1000000
> +#define	MXS_SPI_PORT_OFFSET	0x2000
> +
> +struct mxs_spi_slave {
> +	struct spi_slave	slave;
> +	uint32_t		max_khz;
> +	uint32_t		mode;
> +	struct mx28_ssp_regs	*regs;
> +};
> +
> +static inline struct mxs_spi_slave *to_mxs_slave(struct spi_slave *slave)
> +{
> +	return container_of(slave, struct mxs_spi_slave, slave);
> +}
> +
> +void spi_init(void)
> +{
> +}
> +
> +struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
> +				  unsigned int max_hz, unsigned int mode)
> +{
> +	struct mxs_spi_slave *mxs_slave;
> +	uint32_t addr;
> +
> +	if (bus > 3) {
> +		printf("MXS SPI: Max bus number is 3\n");
> +		return NULL;
> +	}
> +
> +	mxs_slave = malloc(sizeof(struct mxs_spi_slave));
> +	if (!mxs_slave)
> +		return NULL;
> +
> +	addr = MXS_SSP0_BASE + (bus * MXS_SPI_PORT_OFFSET);
> +
> +	mxs_slave->slave.bus = bus;
> +	mxs_slave->slave.cs = cs;
> +	mxs_slave->max_khz = max_hz / 1000;
> +	mxs_slave->mode = mode;
> +	mxs_slave->regs = (struct mx28_ssp_regs *)addr;
> +
> +	return &mxs_slave->slave;
> +}
> +
> +void spi_free_slave(struct spi_slave *slave)
> +{
> +	struct mxs_spi_slave *mxs_slave = to_mxs_slave(slave);
> +	free(mxs_slave);
> +}
> +
> +int spi_claim_bus(struct spi_slave *slave)
> +{
> +	struct mxs_spi_slave *mxs_slave = to_mxs_slave(slave);
> +	struct mx28_ssp_regs *ssp_regs = mxs_slave->regs;
> +	uint32_t reg = 0;
> +
> +	mx28_reset_block(&ssp_regs->hw_ssp_ctrl0_reg);
> +
> +	writel(SSP_CTRL0_BUS_WIDTH_ONE_BIT, &ssp_regs->hw_ssp_ctrl0);
> +
> +	reg = SSP_CTRL1_SSP_MODE_SPI | SSP_CTRL1_WORD_LENGTH_EIGHT_BITS;
> +	reg |= (mxs_slave->mode & SPI_CPOL) ? SSP_CTRL1_POLARITY : 0;
> +	reg |= (mxs_slave->mode & SPI_CPHA) ? SSP_CTRL1_PHASE : 0;
> +	writel(reg, &ssp_regs->hw_ssp_ctrl1);
> +
> +	writel(0, &ssp_regs->hw_ssp_cmd0);
> +
> +	mx28_set_ssp_busclock(slave->bus, mxs_slave->max_khz);
> +
> +	return 0;
> +}
> +
> +void spi_release_bus(struct spi_slave *slave)
> +{
> +}
> +
> +static void mxs_spi_start_xfer(struct mx28_ssp_regs *ssp_regs)
> +{
> +	writel(SSP_CTRL0_LOCK_CS, &ssp_regs->hw_ssp_ctrl0_set);
> +	writel(SSP_CTRL0_IGNORE_CRC, &ssp_regs->hw_ssp_ctrl0_clr);
> +}
> +
> +static void mxs_spi_end_xfer(struct mx28_ssp_regs *ssp_regs)
> +{
> +	writel(SSP_CTRL0_LOCK_CS, &ssp_regs->hw_ssp_ctrl0_clr);
> +	writel(SSP_CTRL0_IGNORE_CRC, &ssp_regs->hw_ssp_ctrl0_set);
> +}
> +
> +int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
> +		const void *dout, void *din, unsigned long flags)
> +{
> +	struct mxs_spi_slave *mxs_slave = to_mxs_slave(slave);
> +	struct mx28_ssp_regs *ssp_regs = mxs_slave->regs;
> +	int len = bitlen / 8;
> +	const char *tx = dout;
> +	char *rx = din;
> +
> +	if (bitlen == 0)
> +		return 0;
> +
> +	if (!rx && !tx)
> +		return 0;
> +
> +	if (flags & SPI_XFER_BEGIN)
> +		mxs_spi_start_xfer(ssp_regs);
> +
> +	while (len--) {
> +		/* We transfer 1 byte */
> +		writel(1, &ssp_regs->hw_ssp_xfer_size);
> +
> +		if ((flags & SPI_XFER_END) && !len)
> +			mxs_spi_end_xfer(ssp_regs);
> +
> +		if (tx)
> +			writel(SSP_CTRL0_READ, &ssp_regs->hw_ssp_ctrl0_clr);
> +		else
> +			writel(SSP_CTRL0_READ, &ssp_regs->hw_ssp_ctrl0_set);
> +
> +		writel(SSP_CTRL0_RUN, &ssp_regs->hw_ssp_ctrl0_set);
> +
> +		if (mx28_wait_mask_set(&ssp_regs->hw_ssp_ctrl0_reg,
> +			SSP_CTRL0_RUN, MXS_SPI_MAX_TIMEOUT)) {
> +			printf("MXS SPI: Timeout waiting for start\n");
> +			return -1;
> +		}
> +
> +		if (tx)
> +			writel(*tx++, &ssp_regs->hw_ssp_data);
> +
> +		writel(SSP_CTRL0_DATA_XFER, &ssp_regs->hw_ssp_ctrl0_set);
> +
> +		if (rx) {
> +			if (mx28_wait_mask_clr(&ssp_regs->hw_ssp_status_reg,
> +				SSP_STATUS_FIFO_EMPTY, MXS_SPI_MAX_TIMEOUT)) {
> +				printf("MXS SPI: Timeout waiting for data\n");
> +				return -1;
> +			}
> +
> +			*rx = readl(&ssp_regs->hw_ssp_data);
> +			rx++;
> +		}
> +
> +		if (mx28_wait_mask_clr(&ssp_regs->hw_ssp_ctrl0_reg,
> +			SSP_CTRL0_RUN, MXS_SPI_MAX_TIMEOUT)) {
> +			printf("MXS SPI: Timeout waiting for finish\n");
> +			return -1;
> +		}
> +	}
> +
> +	return 0;
> +}

Applied to u-boot-imx, thanks.

Best regards,
Stefano Babic

Patch

diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 84ad6fa..6f389f0 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -37,6 +37,7 @@  COBJS-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o
 COBJS-$(CONFIG_MPC52XX_SPI) += mpc52xx_spi.o
 COBJS-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o
 COBJS-$(CONFIG_MXC_SPI) += mxc_spi.o
+COBJS-$(CONFIG_MXS_SPI) += mxs_spi.o
 COBJS-$(CONFIG_OC_TINY_SPI) += oc_tiny_spi.o
 COBJS-$(CONFIG_OMAP3_SPI) += omap3_spi.o
 COBJS-$(CONFIG_SOFT_SPI) += soft_spi.o
diff --git a/drivers/spi/mxs_spi.c b/drivers/spi/mxs_spi.c
new file mode 100644
index 0000000..4c27fef
--- /dev/null
+++ b/drivers/spi/mxs_spi.c
@@ -0,0 +1,186 @@ 
+/*
+ * Freescale i.MX28 SPI driver
+ *
+ * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
+ * on behalf of DENX Software Engineering GmbH
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ * NOTE: This driver only supports the SPI-controller chipselects,
+ *       GPIO driven chipselects are not supported.
+ */
+
+#include <common.h>
+#include <malloc.h>
+#include <spi.h>
+#include <asm/errno.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/sys_proto.h>
+
+#define	MXS_SPI_MAX_TIMEOUT	1000000
+#define	MXS_SPI_PORT_OFFSET	0x2000
+
+struct mxs_spi_slave {
+	struct spi_slave	slave;
+	uint32_t		max_khz;
+	uint32_t		mode;
+	struct mx28_ssp_regs	*regs;
+};
+
+static inline struct mxs_spi_slave *to_mxs_slave(struct spi_slave *slave)
+{
+	return container_of(slave, struct mxs_spi_slave, slave);
+}
+
+void spi_init(void)
+{
+}
+
+struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
+				  unsigned int max_hz, unsigned int mode)
+{
+	struct mxs_spi_slave *mxs_slave;
+	uint32_t addr;
+
+	if (bus > 3) {
+		printf("MXS SPI: Max bus number is 3\n");
+		return NULL;
+	}
+
+	mxs_slave = malloc(sizeof(struct mxs_spi_slave));
+	if (!mxs_slave)
+		return NULL;
+
+	addr = MXS_SSP0_BASE + (bus * MXS_SPI_PORT_OFFSET);
+
+	mxs_slave->slave.bus = bus;
+	mxs_slave->slave.cs = cs;
+	mxs_slave->max_khz = max_hz / 1000;
+	mxs_slave->mode = mode;
+	mxs_slave->regs = (struct mx28_ssp_regs *)addr;
+
+	return &mxs_slave->slave;
+}
+
+void spi_free_slave(struct spi_slave *slave)
+{
+	struct mxs_spi_slave *mxs_slave = to_mxs_slave(slave);
+	free(mxs_slave);
+}
+
+int spi_claim_bus(struct spi_slave *slave)
+{
+	struct mxs_spi_slave *mxs_slave = to_mxs_slave(slave);
+	struct mx28_ssp_regs *ssp_regs = mxs_slave->regs;
+	uint32_t reg = 0;
+
+	mx28_reset_block(&ssp_regs->hw_ssp_ctrl0_reg);
+
+	writel(SSP_CTRL0_BUS_WIDTH_ONE_BIT, &ssp_regs->hw_ssp_ctrl0);
+
+	reg = SSP_CTRL1_SSP_MODE_SPI | SSP_CTRL1_WORD_LENGTH_EIGHT_BITS;
+	reg |= (mxs_slave->mode & SPI_CPOL) ? SSP_CTRL1_POLARITY : 0;
+	reg |= (mxs_slave->mode & SPI_CPHA) ? SSP_CTRL1_PHASE : 0;
+	writel(reg, &ssp_regs->hw_ssp_ctrl1);
+
+	writel(0, &ssp_regs->hw_ssp_cmd0);
+
+	mx28_set_ssp_busclock(slave->bus, mxs_slave->max_khz);
+
+	return 0;
+}
+
+void spi_release_bus(struct spi_slave *slave)
+{
+}
+
+static void mxs_spi_start_xfer(struct mx28_ssp_regs *ssp_regs)
+{
+	writel(SSP_CTRL0_LOCK_CS, &ssp_regs->hw_ssp_ctrl0_set);
+	writel(SSP_CTRL0_IGNORE_CRC, &ssp_regs->hw_ssp_ctrl0_clr);
+}
+
+static void mxs_spi_end_xfer(struct mx28_ssp_regs *ssp_regs)
+{
+	writel(SSP_CTRL0_LOCK_CS, &ssp_regs->hw_ssp_ctrl0_clr);
+	writel(SSP_CTRL0_IGNORE_CRC, &ssp_regs->hw_ssp_ctrl0_set);
+}
+
+int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
+		const void *dout, void *din, unsigned long flags)
+{
+	struct mxs_spi_slave *mxs_slave = to_mxs_slave(slave);
+	struct mx28_ssp_regs *ssp_regs = mxs_slave->regs;
+	int len = bitlen / 8;
+	const char *tx = dout;
+	char *rx = din;
+
+	if (bitlen == 0)
+		return 0;
+
+	if (!rx && !tx)
+		return 0;
+
+	if (flags & SPI_XFER_BEGIN)
+		mxs_spi_start_xfer(ssp_regs);
+
+	while (len--) {
+		/* We transfer 1 byte */
+		writel(1, &ssp_regs->hw_ssp_xfer_size);
+
+		if ((flags & SPI_XFER_END) && !len)
+			mxs_spi_end_xfer(ssp_regs);
+
+		if (tx)
+			writel(SSP_CTRL0_READ, &ssp_regs->hw_ssp_ctrl0_clr);
+		else
+			writel(SSP_CTRL0_READ, &ssp_regs->hw_ssp_ctrl0_set);
+
+		writel(SSP_CTRL0_RUN, &ssp_regs->hw_ssp_ctrl0_set);
+
+		if (mx28_wait_mask_set(&ssp_regs->hw_ssp_ctrl0_reg,
+			SSP_CTRL0_RUN, MXS_SPI_MAX_TIMEOUT)) {
+			printf("MXS SPI: Timeout waiting for start\n");
+			return -1;
+		}
+
+		if (tx)
+			writel(*tx++, &ssp_regs->hw_ssp_data);
+
+		writel(SSP_CTRL0_DATA_XFER, &ssp_regs->hw_ssp_ctrl0_set);
+
+		if (rx) {
+			if (mx28_wait_mask_clr(&ssp_regs->hw_ssp_status_reg,
+				SSP_STATUS_FIFO_EMPTY, MXS_SPI_MAX_TIMEOUT)) {
+				printf("MXS SPI: Timeout waiting for data\n");
+				return -1;
+			}
+
+			*rx = readl(&ssp_regs->hw_ssp_data);
+			rx++;
+		}
+
+		if (mx28_wait_mask_clr(&ssp_regs->hw_ssp_ctrl0_reg,
+			SSP_CTRL0_RUN, MXS_SPI_MAX_TIMEOUT)) {
+			printf("MXS SPI: Timeout waiting for finish\n");
+			return -1;
+		}
+	}
+
+	return 0;
+}