@@ -1,3 +1,8 @@
+2011-11-08 David S. Miller <davem@davemloft.net>
+
+ * lib/target-supports.exp (check_effective_target_sparc_vis): New.
+ (check_effective_target_vect_cmdline_needed): Use it when sparc*-*-*
+
2011-11-08 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
PR fortran/50404
@@ -1775,6 +1775,7 @@ proc check_effective_target_vect_cmdline_needed { } {
|| ([istarget powerpc*-*-*]
&& ([check_effective_target_powerpc_spe]
|| [check_effective_target_powerpc_altivec]))
+ || ([istarget sparc*-*-*] && [check_effective_target_sparc_vis])
|| [istarget spu-*-*]
|| ([istarget arm*-*-*] && [check_effective_target_arm_neon]) } {
set et_vect_cmdline_needed_saved 0
@@ -2489,6 +2490,22 @@ proc check_effective_target_ultrasparc_vis3_hw { } {
} "-mcpu=niagara3"]
}
+# Return 1 if this is a Sparc target with VIS enabled.
+
+proc check_effective_target_sparc_vis { } {
+ if { [istarget sparc*-*-*] } {
+ return [check_no_compiler_messages sparc_vis object {
+ #ifndef __VIS__
+ #error not VIS
+ #else
+ int dummy;
+ #endif
+ }]
+ } else {
+ return 0
+ }
+}
+
# Return 1 if the target supports hardware vector shift operation.
proc check_effective_target_vect_shift { } {
I've been wondering why gen-vect-11{,c}.c were failing when running the testsuite with a compiler defaulting to ultrasparc3 or later. The problem is that now that we turn on VIS by default for those chips we need to check this properly in the testsuite target support predicates. Luckily we have the __VIS__ define now, so we can just check that. Committed to trunk. gcc/testsuite/ * lib/target-supports.exp (check_effective_target_sparc_vis): New. (check_effective_target_vect_cmdline_needed): Use it when sparc*-*-* --- gcc/testsuite/ChangeLog | 5 +++++ gcc/testsuite/lib/target-supports.exp | 17 +++++++++++++++++ 2 files changed, 22 insertions(+), 0 deletions(-)