From patchwork Fri Feb 21 05:47:36 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Ang, Chee Hong" X-Patchwork-Id: 1241888 X-Patchwork-Delegate: simon.k.r.goldschmidt@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=intel.com Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48P0tx1r8dz9sPk for ; Fri, 21 Feb 2020 16:51:04 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 6E3E081969; Fri, 21 Feb 2020 06:49:11 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 3262181944; Fri, 21 Feb 2020 06:48:37 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id D072F8194E for ; Fri, 21 Feb 2020 06:48:32 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=chee.hong.ang@intel.com X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 20 Feb 2020 21:48:31 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,467,1574150400"; d="scan'208";a="315964518" Received: from unknown (HELO admin-vm-ubuntu1604.localdomain) ([10.226.242.173]) by orsmga001.jf.intel.com with ESMTP; 20 Feb 2020 21:48:29 -0800 From: chee.hong.ang@intel.com To: u-boot@lists.denx.de Cc: Marek Vasut , Simon Goldschmidt , Ching Liang See , Ley Foon Tan , Dalon Westergteen , Chee Hong Ang , Richard Gong Subject: [PATCH v3 18/21] arm: socfpga: Bridge reset invokes SMC service calls in EL2 Date: Thu, 20 Feb 2020 21:47:36 -0800 Message-Id: <1582264059-37988-19-git-send-email-chee.hong.ang@intel.com> In-Reply-To: <1582264059-37988-1-git-send-email-chee.hong.ang@intel.com> References: <1582264059-37988-1-git-send-email-chee.hong.ang@intel.com> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de X-Virus-Status: Clean From: Chee Hong Ang In EL3, do_bridge_reset() directly send mailbox commands to SDM to query the FPGA configuration status. If running in non-secure mode (EL2), it invokes SMC service calls to ATF (EL3) to perform the query. Signed-off-by: Chee Hong Ang --- arch/arm/mach-socfpga/misc_s10.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-socfpga/misc_s10.c b/arch/arm/mach-socfpga/misc_s10.c index 393b486..d93aaf5 100644 --- a/arch/arm/mach-socfpga/misc_s10.c +++ b/arch/arm/mach-socfpga/misc_s10.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include @@ -154,11 +155,24 @@ void do_bridge_reset(int enable, unsigned int mask) { /* Check FPGA status before bridge enable */ if (enable) { +#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_ATF) + u64 arg = 1; + + /* Send MBOX_RECONFIG_STATUS to SDM */ + int ret = invoke_smc(INTEL_SIP_SMC_FPGA_CONFIG_ISDONE, NULL, 0, + NULL, 0); + + if (ret && ret != INTEL_SIP_SMC_FPGA_CONFIG_STATUS_BUSY) { + /* Send MBOX_CONFIG_STATUS to SDM */ + ret = invoke_smc(INTEL_SIP_SMC_FPGA_CONFIG_ISDONE, + &arg, 1, NULL, 0); + } +#else int ret = mbox_get_fpga_config_status(MBOX_RECONFIG_STATUS); if (ret && ret != MBOX_CFGSTAT_STATE_CONFIG) ret = mbox_get_fpga_config_status(MBOX_CONFIG_STATUS); - +#endif if (ret) return; }