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Tue, 8 Nov 2011 01:35:18 +0530 Received: from localhost.localdomain (dbdp20.itg.ti.com [172.24.170.38]) by dbdp31.itg.ti.com (8.13.8/8.13.8) with ESMTP id pA7K55a0005833 for ; Tue, 8 Nov 2011 01:35:17 +0530 (IST) From: Tom Rini To: Date: Mon, 7 Nov 2011 13:05:42 -0700 Message-ID: <1320696348-11664-7-git-send-email-trini@ti.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1320696348-11664-1-git-send-email-trini@ti.com> References: <1320696348-11664-1-git-send-email-trini@ti.com> MIME-Version: 1.0 Subject: [U-Boot] [PATCH 06/12] OMAP3: Suffix all Micron memory timing parts with their speed X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Signed-off-by: Tom Rini --- arch/arm/include/asm/arch-omap3/mem.h | 54 +++++++++++++++++---------------- 1 files changed, 28 insertions(+), 26 deletions(-) diff --git a/arch/arm/include/asm/arch-omap3/mem.h b/arch/arm/include/asm/arch-omap3/mem.h index 61baccb..a55553c 100644 --- a/arch/arm/include/asm/arch-omap3/mem.h +++ b/arch/arm/include/asm/arch-omap3/mem.h @@ -134,28 +134,30 @@ enum { (MICRON_XSR_165 << 0) | (MICRON_TXP_165 << 8) | \ (MICRON_TWTR_165 << 16)) -#define MICRON_RAMTYPE 0x1 -#define MICRON_DDRTYPE 0x0 -#define MICRON_DEEPPD 0x1 -#define MICRON_B32NOT16 0x1 -#define MICRON_BANKALLOCATION 0x2 -#define MICRON_RAMSIZE ((PHYS_SDRAM_1_SIZE/(1024*1024))/2) -#define MICRON_ADDRMUXLEGACY 0x1 -#define MICRON_CASWIDTH 0x5 -#define MICRON_RASWIDTH 0x2 -#define MICRON_LOCKSTATUS 0x0 -#define MICRON_V_MCFG ((MICRON_LOCKSTATUS << 30) | (MICRON_RASWIDTH << 24) | \ - (MICRON_CASWIDTH << 20) | (MICRON_ADDRMUXLEGACY << 19) | \ - (MICRON_RAMSIZE << 8) | (MICRON_BANKALLOCATION << 6) | \ - (MICRON_B32NOT16 << 4) | (MICRON_DEEPPD << 3) | \ - (MICRON_DDRTYPE << 2) | (MICRON_RAMTYPE)) - -#define MICRON_BL 0x2 -#define MICRON_SIL 0x0 -#define MICRON_CASL 0x3 -#define MICRON_WBST 0x0 -#define MICRON_V_MR ((MICRON_WBST << 9) | (MICRON_CASL << 4) | \ - (MICRON_SIL << 3) | (MICRON_BL)) +#define MICRON_RAMTYPE_165 0x1 +#define MICRON_DDRTYPE_165 0x0 +#define MICRON_DEEPPD_165 0x1 +#define MICRON_B32NOT16_165 0x1 +#define MICRON_BANKALLOCATION_165 0x2 +#define MICRON_RAMSIZE_165 ((PHYS_SDRAM_1_SIZE/(1024*1024))/2) +#define MICRON_ADDRMUXLEGACY_165 0x1 +#define MICRON_CASWIDTH_165 0x5 +#define MICRON_RASWIDTH_165 0x2 +#define MICRON_LOCKSTATUS_165 0x0 +#define MICRON_V_MCFG_165 ((MICRON_LOCKSTATUS_165 << 30) | \ + (MICRON_RASWIDTH_165 << 24) | (MICRON_CASWIDTH_165 << 20) | \ + (MICRON_ADDRMUXLEGACY_165 << 19) | (MICRON_RAMSIZE_165 << 8) | \ + (MICRON_BANKALLOCATION_165 << 6) | \ + (MICRON_B32NOT16_165 << 4) | (MICRON_DEEPPD_165 << 3) | \ + (MICRON_DDRTYPE_165 << 2) | (MICRON_RAMTYPE_165)) + +#define MICRON_BL_165 0x2 +#define MICRON_SIL_165 0x0 +#define MICRON_CASL_165 0x3 +#define MICRON_WBST_165 0x0 +#define MICRON_V_MR_165 ((MICRON_WBST_165 << 9) | \ + (MICRON_CASL_165 << 4) | (MICRON_SIL_165 << 3) | \ + (MICRON_BL_165)) /* * NUMONYX part of IGEP v2 (165MHz optimized) 6.06ns @@ -202,11 +204,11 @@ enum { #endif #ifdef CONFIG_OMAP3_MICRON_DDR -#define V_ACTIMA_165 MICRON_V_ACTIMA_165 -#define V_ACTIMB_165 MICRON_V_ACTIMB_165 -#define V_MCFG MICRON_V_MCFG +#define V_ACTIMA_165 MICRON_V_ACTIMA_165 +#define V_ACTIMB_165 MICRON_V_ACTIMB_165 +#define V_MCFG MICRON_V_MCFG_165 #define V_RFR_CTRL SDP_3430_SDRC_RFR_CTRL_165MHz -#define V_MR MICRON_V_MR +#define V_MR MICRON_V_MR_165 #endif #ifdef CONFIG_OMAP3_NUMONYX_DDR