From patchwork Mon Nov 7 17:59:20 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Steve Conklin X-Patchwork-Id: 124160 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from chlorine.canonical.com (chlorine.canonical.com [91.189.94.204]) by ozlabs.org (Postfix) with ESMTP id 813041007D4 for ; Tue, 8 Nov 2011 05:00:02 +1100 (EST) Received: from localhost ([127.0.0.1] helo=chlorine.canonical.com) by chlorine.canonical.com with esmtp (Exim 4.71) (envelope-from ) id 1RNTUB-0008HI-5C; Mon, 07 Nov 2011 17:59:55 +0000 Received: from youngberry.canonical.com ([91.189.89.112]) by chlorine.canonical.com with esmtp (Exim 4.71) (envelope-from ) id 1RNTU9-0008Gq-DH for kernel-team@lists.ubuntu.com; Mon, 07 Nov 2011 17:59:53 +0000 Received: from user-69-73-1-154.knology.net ([69.73.1.154] helo=[172.31.0.160]) by youngberry.canonical.com with esmtpsa (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1RNTU9-0003Jf-5K for kernel-team@lists.ubuntu.com; Mon, 07 Nov 2011 17:59:53 +0000 Message-ID: <4EB81C78.9090308@canonical.com> Date: Mon, 07 Nov 2011 11:59:20 -0600 From: Steve Conklin User-Agent: Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.9.2.23) Gecko/20110922 Thunderbird/3.1.15 MIME-Version: 1.0 To: kernel-team@lists.ubuntu.com Subject: Fwd: [PATCH 2/2] xHCI: Clear PLC for USB2 root hub ports X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.13 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: kernel-team-bounces@lists.ubuntu.com Errors-To: kernel-team-bounces@lists.ubuntu.com -------- Original Message -------- Subject: [PATCH 2/2] xHCI: Clear PLC for USB2 root hub ports Date: Fri, 4 Nov 2011 13:20:56 -0700 From: Sarah Sharp To: stable@vger.kernel.org CC: Andiry Xu , Don Zickus , Steve Conklin From: Andiry Xu When the link state changes, xHC will report a port status change event and set the PORT_PLC bit, for both USB3 and USB2 root hub ports. The PLC will be cleared by usbcore for USB3 root hub ports, but not for USB2 ports, because they do not report USB_PORT_STAT_C_LINK_STATE in wPortChange. Clear it for USB2 root hub ports in handle_port_status(). Signed-off-by: Andiry Xu Signed-off-by: Sarah Sharp Signed-off-by: Greg Kroah-Hartman --- drivers/usb/host/xhci-ring.c | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c index 831d0d4..0338ca9 100644 --- a/drivers/usb/host/xhci-ring.c +++ b/drivers/usb/host/xhci-ring.c @@ -1354,6 +1354,10 @@ static void handle_port_status(struct xhci_hcd *xhci, } } + if (hcd->speed != HCD_USB3) + xhci_test_and_clear_bit(xhci, port_array, faked_port_index, + PORT_PLC); + cleanup: /* Update event ring dequeue pointer before dropping the lock */ inc_deq(xhci, xhci->event_ring, true);