From patchwork Fri Feb 14 16:34:49 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinath Parvathaneni X-Patchwork-Id: 1238247 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-519557-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha1 header.s=default header.b=RhwmZ+gK; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=armh.onmicrosoft.com header.i=@armh.onmicrosoft.com header.a=rsa-sha256 header.s=selector2-armh-onmicrosoft-com header.b=8T1ERRX1; dkim=fail reason="signature verification failed" (1024-bit key) header.d=armh.onmicrosoft.com header.i=@armh.onmicrosoft.com header.a=rsa-sha256 header.s=selector2-armh-onmicrosoft-com header.b=8T1ERRX1; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48K10j3ZbtzB44Y for ; Sat, 15 Feb 2020 04:42:13 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :content-type:from:date:to:cc:subject:message-id:mime-version; q=dns; s=default; b=xDCsM4IyNNTnOLyUY6M8Yo9gFlYXbqECBPaglMwe7li /wbNclY+oMXDOEa8YO+EX4kBViwz8/amOPU2DT2746l7LQsG7UXJXzuNRkx4XkaZ VKBWRM0UyIJJ26ZvRqCG/2UjSTFBgMhVfZj3k4UEO8K2QKc7R5kjq0RkZ/D2Wz1k = DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :content-type:from:date:to:cc:subject:message-id:mime-version; s=default; bh=6KhdMn44WsQ1uZkJvoQ7JU7MkYo=; b=RhwmZ+gKuweKfuTqY 5VePHu4pX7OCjhQuM/EM0idWk/0/HvrYPXAXj4s36cy4HHoOd6ArOiu2lvYTVz0Q Uvzd3+MJJM6q2UoMFDkxa8tVIEFBcTocGLLvfgSjdht3d6dhT3YO76NPJffbLsd4 p2GYcS1rYXb+S96wh4MLENdugk= Received: (qmail 30104 invoked by alias); 14 Feb 2020 17:42:04 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 30078 invoked by uid 89); 14 Feb 2020 17:42:04 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-22.0 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_SHORT, MSGID_FROM_MTA_HEADER, RCVD_IN_DNSWL_NONE, SPF_HELO_PASS, SPF_PASS, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 spammy= X-HELO: EUR05-DB8-obe.outbound.protection.outlook.com Received: from mail-db8eur05on2047.outbound.protection.outlook.com (HELO EUR05-DB8-obe.outbound.protection.outlook.com) (40.107.20.47) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 14 Feb 2020 17:42:01 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector2-armh-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=h+tTIhf2A5+ch/z1cXONp+Asi73bTJ58sldbk1bfdac=; b=8T1ERRX1mIcsbTq31dxoe0lJJpexb2zkF0jZcgVkPsfvz9VxuDYag0O/h5/pLVxghjkrVSnY6f5INRLkS8BpAvA5sOQohtjI59b/UPQ+deu/6Z2reEY9jw4ziDVI+XZtXySuVnEi599htNMLyZJUdE1RPW+Dc2yLdIVN3Fj/j3w= Received: from AM6PR08CA0023.eurprd08.prod.outlook.com (2603:10a6:20b:b2::35) by VI1PR08MB5293.eurprd08.prod.outlook.com (2603:10a6:803:df::25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2707.21; Fri, 14 Feb 2020 17:41:57 +0000 Received: from VE1EUR03FT003.eop-EUR03.prod.protection.outlook.com (2a01:111:f400:7e09::208) by AM6PR08CA0023.outlook.office365.com (2603:10a6:20b:b2::35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2729.25 via Frontend Transport; Fri, 14 Feb 2020 17:41:57 +0000 Authentication-Results: spf=pass (sender IP is 63.35.35.123) smtp.mailfrom=arm.com; gcc.gnu.org; dkim=pass (signature was verified) header.d=armh.onmicrosoft.com; gcc.gnu.org; dmarc=bestguesspass action=none header.from=arm.com; Received-SPF: Pass (protection.outlook.com: domain of arm.com designates 63.35.35.123 as permitted sender) receiver=protection.outlook.com; client-ip=63.35.35.123; helo=64aa7808-outbound-1.mta.getcheckrecipient.com; Received: from 64aa7808-outbound-1.mta.getcheckrecipient.com (63.35.35.123) by VE1EUR03FT003.mail.protection.outlook.com (10.152.18.108) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2665.18 via Frontend Transport; Fri, 14 Feb 2020 17:41:57 +0000 Received: ("Tessian outbound 1f9bda537fdc:v42"); Fri, 14 Feb 2020 17:41:56 +0000 X-CheckRecipientChecked: true X-CR-MTA-CID: 376d9a40ce28b948 X-CR-MTA-TID: 64aa7808 Received: from a14c511f5875.2 by 64aa7808-outbound-1.mta.getcheckrecipient.com id 7A179F5B-6992-409A-8EBC-FA233EB0AED8.1; Fri, 14 Feb 2020 17:41:51 +0000 Received: from EUR03-AM5-obe.outbound.protection.outlook.com by 64aa7808-outbound-1.mta.getcheckrecipient.com with ESMTPS id a14c511f5875.2 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384); Fri, 14 Feb 2020 17:41:51 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=U+CMkjGyctA/dQDCbksekZ96HQKS9sKbaygtt1zfxdVx2KO74qSkJxp449/P9Ys972/m0DHEmCUpMa7TJ0cYr6fBc0OODCZ+WkmLyOxtfZDWy6CJov/OiYKCLY5deXaC5ZWEOwVIl81znxMqqTSgNkVAaJtuJhcQOi4Kgx50cfXD4465/kgfBn26vXEjVilb0hUZ6bfbhYxoH2EoVkxzCVvGEVeitil7OavDTIxMg9xtIkv5+DZZ8+R1qIqbz7WBYyyHcshdFU6Uc3NsAVlSzqjAL2dbqiXTZvDX6hhbdYeYYSKWjTcNCXCftASUlYk0MgjR1uc8YrC1Nf7JwXolZA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=h+tTIhf2A5+ch/z1cXONp+Asi73bTJ58sldbk1bfdac=; b=QzI0pKhHlMas9T79T89BaBATwH3DRdrHz3Cgb4eMfTDFZgLvrVv9V60Jz8gkIxA/gfCoII6G5rYBY9hf4YjLrk2YY1UDRzYzquhF6Rew8FyceY7yTDJ0lIKPRws8gMQWqPLYdNw0LO/iJi2AyBYeZ4ksz1AO2NbjbtP7hAZYLbJtYuB2M3Oo/3UT+HAk9WT/SQF8Xvlaly+Y09JCtW27gn+ropF2kCURhWdlQ0sG6u1xKygKG9wJviZ1KBCqy17CcRUlWlL4bMliyLMj0iXzYiBJM2KoJizAJh46p3HzBjvMWluiF2g09mu6gHni4fIWj0Wr457EZInJZ/ZrhTvmnw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=arm.com; dmarc=pass action=none header.from=arm.com; dkim=pass header.d=arm.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector2-armh-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=h+tTIhf2A5+ch/z1cXONp+Asi73bTJ58sldbk1bfdac=; b=8T1ERRX1mIcsbTq31dxoe0lJJpexb2zkF0jZcgVkPsfvz9VxuDYag0O/h5/pLVxghjkrVSnY6f5INRLkS8BpAvA5sOQohtjI59b/UPQ+deu/6Z2reEY9jw4ziDVI+XZtXySuVnEi599htNMLyZJUdE1RPW+Dc2yLdIVN3Fj/j3w= Authentication-Results-Original: spf=none (sender IP is ) smtp.mailfrom=Srinath.Parvathaneni@arm.com; Received: from DBBPR08MB4775.eurprd08.prod.outlook.com (20.179.46.211) by DBBPR08MB4492.eurprd08.prod.outlook.com (20.179.40.78) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2729.22; Fri, 14 Feb 2020 17:41:49 +0000 Received: from DBBPR08MB4775.eurprd08.prod.outlook.com ([fe80::4c0a:39e2:c45b:d41c]) by DBBPR08MB4775.eurprd08.prod.outlook.com ([fe80::4c0a:39e2:c45b:d41c%4]) with mapi id 15.20.2707.031; Fri, 14 Feb 2020 17:41:49 +0000 From: Srinath Parvathaneni Date: Fri, 14 Feb 2020 16:34:49 +0000 To: gcc-patches@gcc.gnu.org Cc: kyrylo.tkachov@arm.com, richard.earnshaw@arm.com Subject: [PATCH v2][ARM][GCC][3/x]: MVE ACLE intrinsics framework patch. Message-ID: MIME-Version: 1.0 Received: from e120703-lin.cambridge.arm.com (217.140.106.50) by DM6PR02CA0119.namprd02.prod.outlook.com (2603:10b6:5:1b4::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2729.25 via Frontend Transport; Fri, 14 Feb 2020 17:41:47 +0000 X-MS-Exchange-Transport-Forked: True x-checkrecipientrouted: true X-MS-Oob-TLC-OOBClassifiers: OLM:9508;OLM:9508; X-Forefront-Antispam-Report-Untrusted: SFV:NSPM; SFS:(10009020)(4636009)(376002)(366004)(39860400002)(396003)(136003)(346002)(199004)(189003)(4326008)(8936002)(6512007)(9686003)(53546011)(52116002)(5660300002)(33964004)(6916009)(4001150100001)(2906002)(52536014)(66946007)(86362001)(66476007)(66616009)(66556008)(235185007)(316002)(8676002)(81166006)(81156014)(33656002)(186003)(966005)(16526019)(478600001)(956004)(44832011)(6486002)(26005); DIR:OUT; SFP:1101; SCL:1; SRVR:DBBPR08MB4492; H:DBBPR08MB4775.eurprd08.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; Received-SPF: None (protection.outlook.com: arm.com does not designate permitted sender hosts) X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam-Untrusted: BCL:0; X-Microsoft-Antispam-Message-Info-Original: CHA+d1O9d0H/YtnIYQqV9OkycxvtIwikwWYRTDBPhysIJ5NeSIGtLXzNLVQ8tyytPNh4xZfdRSTmmKNHi+KhAOQ8dLa5dmdRwcuxAoqBqTLZuH2ubaGFXx/IJU28QaTjFfeABaomEiQSiX5/j9QTkAbCQVlm0We1xILk00KU7VsxVESH5MbPa89Uo9IH1dIpo3scabOZU/VYgjvC+8BpPp5HUmKO8QYJ1NkAdhMV9UZ5sHVZ0S3Pwxl10/qJUVy8HpO3Zwb9S6QHMr3u5DIrIq1ORHtuDPTAAEbux2VBtGbv5M0lnVbBCoY3KlVZwT5n5oqgME3P/v05lr9mGysEQivuejqAiCklXCH4I1CqgIlAICbLK0jLZNoyDyn9mk2vi4LuQJtdSzl4wjZ2IPOHrujwO7BNb4X27uwnVTa8L1JlVpLq9n9h8IDe7hv5atq1NE1gxgUdpCMfW7GES4Wz0KXgR7GppQ9ti97qPmd6F/lYMsBnTzcAwP3ZtPxD40ExEGl/yPwV+WyOEjh0LirT7Q== X-MS-Exchange-AntiSpam-MessageData: B/+0ZMHMAr9d9uef6EunW+Pm2YHQAQxlEs7XdkEZus7wA+TRi5semvqxEHLSRXiYQZ/DTn5FWUco+vJxZfZniLAtdmfd60ZLNqe8EGfYuzvz0k+4YPjq5Vg5MtZzrZLLcGX+KP7jlA9qzqD4i7nzlg== Original-Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=Srinath.Parvathaneni@arm.com; X-MS-Exchange-Transport-CrossTenantHeadersStripped: VE1EUR03FT003.eop-EUR03.prod.protection.outlook.com X-MS-Office365-Filtering-Correlation-Id-Prvs: 00c67f17-6c54-4a9c-6c91-08d7b1752b1b X-IsSubscribed: yes Hello Kyrill, In this patch (v2) all the review comments mentioned in previous patch (v1) are addressed. (v1) https://gcc.gnu.org/ml/gcc-patches/2019-12/msg01401.html ##################### Hello, This patch is part of MVE ACLE intrinsics framework. The patch supports the use of emulation for the single-precision arithmetic operations for MVE. This changes are to support the MVE ACLE intrinsics which operates on vector floating point arithmetic operations. Please refer to Arm reference manual [1] for more details. [1] https://static.docs.arm.com/ddi0553/bh/DDI0553B_h_armv8m_arm.pdf?_ga=2.102521798.659307368.1572453718-1501600630.1548848914 Regression tested on arm-none-eabi and found no regressions. Ok for trunk? Thanks, Srinath. gcc/ChangeLog: 2019-11-11 Andre Vieira Srinath Parvathaneni * config/arm/arm.c (arm_libcall_uses_aapcs_base): Modify function to add emulator calls for dobule precision arithmetic operations for MVE. ############### Attachment also inlined for ease of reply ############### >From af9d1eb4470c26564b69518bbec3fce297501fdd Mon Sep 17 00:00:00 2001 From: Srinath Parvathaneni Date: Tue, 11 Feb 2020 18:42:20 +0000 Subject: [PATCH] [PATCH][ARM][GCC][3/x]: MVE ACLE intrinsics framework patch. --- gcc/config/arm/arm.c | 22 ++++++- .../gcc.target/arm/mve/intrinsics/mve_libcall1.c | 70 ++++++++++++++++++++++ .../gcc.target/arm/mve/intrinsics/mve_libcall2.c | 70 ++++++++++++++++++++++ 3 files changed, 159 insertions(+), 3 deletions(-) create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_libcall1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_libcall2.c diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 037f298..e00024b 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -5754,9 +5754,25 @@ arm_libcall_uses_aapcs_base (const_rtx libcall) /* Values from double-precision helper functions are returned in core registers if the selected core only supports single-precision arithmetic, even if we are using the hard-float ABI. The same is - true for single-precision helpers, but we will never be using the - hard-float ABI on a CPU which doesn't support single-precision - operations in hardware. */ + true for single-precision helpers except in case of MVE, because in + MVE we will be using the hard-float ABI on a CPU which doesn't support + single-precision operations in hardware. In MVE the following check + enables use of emulation for the single-precision arithmetic + operations. */ + if (TARGET_HAVE_MVE) + { + add_libcall (libcall_htab, optab_libfunc (add_optab, SFmode)); + add_libcall (libcall_htab, optab_libfunc (sdiv_optab, SFmode)); + add_libcall (libcall_htab, optab_libfunc (smul_optab, SFmode)); + add_libcall (libcall_htab, optab_libfunc (neg_optab, SFmode)); + add_libcall (libcall_htab, optab_libfunc (sub_optab, SFmode)); + add_libcall (libcall_htab, optab_libfunc (eq_optab, SFmode)); + add_libcall (libcall_htab, optab_libfunc (lt_optab, SFmode)); + add_libcall (libcall_htab, optab_libfunc (le_optab, SFmode)); + add_libcall (libcall_htab, optab_libfunc (ge_optab, SFmode)); + add_libcall (libcall_htab, optab_libfunc (gt_optab, SFmode)); + add_libcall (libcall_htab, optab_libfunc (unord_optab, SFmode)); + } add_libcall (libcall_htab, optab_libfunc (add_optab, DFmode)); add_libcall (libcall_htab, optab_libfunc (sdiv_optab, DFmode)); add_libcall (libcall_htab, optab_libfunc (smul_optab, DFmode)); diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_libcall1.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_libcall1.c new file mode 100644 index 0000000..45f46b1 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_libcall1.c @@ -0,0 +1,70 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +/* { dg-add-options arm_v8_1m_mve } */ + +float +foo (float a, float b, float c) +{ + return a + b + c; +} + +/* { dg-final { scan-assembler "bl\\t__aeabi_fadd" } } */ +/* { dg-final { scan-assembler-times "bl\\t__aeabi_fadd" 2 } } */ + +float +foo1 (float a, float b, float c) +{ + return a - b - c; +} + +/* { dg-final { scan-assembler "bl\\t__aeabi_fsub" } } */ +/* { dg-final { scan-assembler-times "bl\\t__aeabi_fsub" 2 } } */ + +float +foo2 (float a, float b, float c) +{ + return a * b * c; +} + +/* { dg-final { scan-assembler "bl\\t__aeabi_fmul" } } */ +/* { dg-final { scan-assembler-times "bl\\t__aeabi_fmul" 2 } } */ + +float +foo3 (float b, float c) +{ + return b / c; +} + +/* { dg-final { scan-assembler "bl\\t__aeabi_fdiv" } } */ + +int +foo4 (float b, float c) +{ + return b < c; +} + +/* { dg-final { scan-assembler "bl\\t__aeabi_fcmplt" } } */ + +int +foo5 (float b, float c) +{ + return b > c; +} + +/* { dg-final { scan-assembler "bl\\t__aeabi_fcmpgt" } } */ + +int +foo6 (float b, float c) +{ + return b != c; +} + +/* { dg-final { scan-assembler "bl\\t__aeabi_fcmpeq" } } */ + +int +foo7 (float b, float c) +{ + return b == c; +} + +/* { dg-final { scan-assembler-times "bl\\t__aeabi_fcmpeq" 2 } } */ diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_libcall2.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_libcall2.c new file mode 100644 index 0000000..45216d12 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_libcall2.c @@ -0,0 +1,70 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +/* { dg-add-options arm_v8_1m_mve } */ + +double +foo (double a, double b, double c) +{ + return a + b + c; +} + +/* { dg-final { scan-assembler "bl\\t__aeabi_dadd" } } */ +/* { dg-final { scan-assembler-times "bl\\t__aeabi_dadd" 2 } } */ + +double +foo1 (double a, double b, double c) +{ + return a - b - c; +} + +/* { dg-final { scan-assembler "bl\\t__aeabi_dsub" } } */ +/* { dg-final { scan-assembler-times "bl\\t__aeabi_dsub" 2 } } */ + +double +foo2 (double a, double b, double c) +{ + return a * b * c; +} + +/* { dg-final { scan-assembler "bl\\t__aeabi_dmul" } } */ +/* { dg-final { scan-assembler-times "bl\\t__aeabi_dmul" 2 } } */ + +double +foo3 (double b, double c) +{ + return b / c; +} + +/* { dg-final { scan-assembler "bl\\t__aeabi_ddiv" } } */ + +int +foo4 (double b, double c) +{ + return b < c; +} + +/* { dg-final { scan-assembler "bl\\t__aeabi_dcmplt" } } */ + +int +foo5 (double b, double c) +{ + return b > c; +} + +/* { dg-final { scan-assembler "bl\\t__aeabi_dcmpgt" } } */ + +int +foo6 (double b, double c) +{ + return b != c; +} + +/* { dg-final { scan-assembler "bl\\t__aeabi_dcmpeq" } } */ + +int +foo7 (double b, double c) +{ + return b == c; +} + +/* { dg-final { scan-assembler-times "bl\\t__aeabi_dcmpeq" 2 } } */