From patchwork Sat Nov 5 01:53:28 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: david decotigny X-Patchwork-Id: 123734 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id ADC4DB6FA5 for ; Sat, 5 Nov 2011 12:56:35 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752869Ab1KEBxw (ORCPT ); Fri, 4 Nov 2011 21:53:52 -0400 Received: from smtp-out.google.com ([216.239.44.51]:8615 "EHLO smtp-out.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752522Ab1KEBxv (ORCPT ); Fri, 4 Nov 2011 21:53:51 -0400 Received: from wpaz17.hot.corp.google.com (wpaz17.hot.corp.google.com [172.24.198.81]) by smtp-out.google.com with ESMTP id pA51rgZS024866; Fri, 4 Nov 2011 18:53:42 -0700 DKIM-Signature: v=1; a=rsa-sha1; c=relaxed/relaxed; d=google.com; s=beta; t=1320458022; bh=rKUBPtnuJdxsJPKVYgZSNxkJD6s=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: In-Reply-To:References; b=I7Ao5hxvnbgcCygDsLGQONH8DOk4M401B5krIc+u+ktotKHMgW2MDDE8oUR72bLjI V41EdEY3BbFJnFX0XHaKg== DomainKey-Signature: a=rsa-sha1; s=beta; d=google.com; c=nofws; q=dns; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to: references:in-reply-to:references:organization:x-system-of-record; b=QDgKh2wagrwVYBW7d70LOU1oZbv3pWUpDSEVg9WW+Moq6XMsIhQ4N+51h/CbMGgQs t0wrNrw7dUvNr70FtpV7w== Received: from decotigny.mtv.corp.google.com (decotigny.mtv.corp.google.com [172.18.64.159]) by wpaz17.hot.corp.google.com with ESMTP id pA51rdID016349; Fri, 4 Nov 2011 18:53:39 -0700 Received: by decotigny.mtv.corp.google.com (Postfix, from userid 128857) id F3A5A25206; Fri, 4 Nov 2011 18:53:38 -0700 (PDT) From: David Decotigny To: netdev@vger.kernel.org, linux-kernel@vger.kernel.org Cc: "David S. Miller" , Ian Campbell , Eric Dumazet , Jeff Kirsher , Jiri Pirko , Joe Perches , Szymon Janc , David Decotigny Subject: [PATCH net v3 4/9] forcedeth: expose module parameters in /sys/module Date: Fri, 4 Nov 2011 18:53:28 -0700 Message-Id: X-Mailer: git-send-email 1.7.3.1 In-Reply-To: References: In-Reply-To: References: Organization: Google, Inc. X-System-Of-Record: true Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org In particular, debug_tx_timeout can be updated at runtime. Signed-off-by: David Decotigny --- drivers/net/ethernet/nvidia/forcedeth.c | 18 +++++++++--------- 1 files changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/net/ethernet/nvidia/forcedeth.c b/drivers/net/ethernet/nvidia/forcedeth.c index 3f66b74..295652d 100644 --- a/drivers/net/ethernet/nvidia/forcedeth.c +++ b/drivers/net/ethernet/nvidia/forcedeth.c @@ -6010,23 +6010,23 @@ static void __exit exit_nic(void) pci_unregister_driver(&driver); } -module_param(max_interrupt_work, int, 0); +module_param(max_interrupt_work, int, S_IRUGO); MODULE_PARM_DESC(max_interrupt_work, "forcedeth maximum events handled per interrupt"); -module_param(optimization_mode, int, 0); +module_param(optimization_mode, int, S_IRUGO); MODULE_PARM_DESC(optimization_mode, "In throughput mode (0), every tx & rx packet will generate an interrupt. In CPU mode (1), interrupts are controlled by a timer. In dynamic mode (2), the mode toggles between throughput and CPU mode based on network load."); -module_param(poll_interval, int, 0); +module_param(poll_interval, int, S_IRUGO); MODULE_PARM_DESC(poll_interval, "Interval determines how frequent timer interrupt is generated by [(time_in_micro_secs * 100) / (2^10)]. Min is 0 and Max is 65535."); -module_param(msi, int, 0); +module_param(msi, int, S_IRUGO); MODULE_PARM_DESC(msi, "MSI interrupts are enabled by setting to 1 and disabled by setting to 0."); -module_param(msix, int, 0); +module_param(msix, int, S_IRUGO); MODULE_PARM_DESC(msix, "MSIX interrupts are enabled by setting to 1 and disabled by setting to 0."); -module_param(dma_64bit, int, 0); +module_param(dma_64bit, int, S_IRUGO); MODULE_PARM_DESC(dma_64bit, "High DMA is enabled by setting to 1 and disabled by setting to 0."); -module_param(phy_cross, int, 0); +module_param(phy_cross, int, S_IRUGO); MODULE_PARM_DESC(phy_cross, "Phy crossover detection for Realtek 8201 phy is enabled by setting to 1 and disabled by setting to 0."); -module_param(phy_power_down, int, 0); +module_param(phy_power_down, int, S_IRUGO); MODULE_PARM_DESC(phy_power_down, "Power down phy and disable link when interface is down (1), or leave phy powered up (0)."); -module_param(debug_tx_timeout, bool, 0); +module_param(debug_tx_timeout, bool, S_IRUGO|S_IWUSR); MODULE_PARM_DESC(debug_tx_timeout, "Dump tx related registers and ring when tx_timeout happens");