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Thu, 13 Feb 2020 04:10:18 +0000 From: Zhiqiang Hou To: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, bhelgaas@google.com, robh+dt@kernel.org, andrew.murray@arm.com, arnd@arndb.de, mark.rutland@arm.com, l.subrahmanya@mobiveil.co.in, shawnguo@kernel.org, m.karthikeyan@mobiveil.co.in, leoyang.li@nxp.com, lorenzo.pieralisi@arm.com, catalin.marinas@arm.com, will.deacon@arm.com Cc: Mingkai.Hu@nxp.com, Minghuan.Lian@nxp.com, Xiaowei.Bao@nxp.com, Hou Zhiqiang Subject: [PATCHv10 06/13] PCI: mobiveil: Add callback function for link up check Date: Thu, 13 Feb 2020 12:06:37 +0800 Message-Id: <20200213040644.45858-7-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200213040644.45858-1-Zhiqiang.Hou@nxp.com> References: <20200213040644.45858-1-Zhiqiang.Hou@nxp.com> X-ClientProxiedBy: HK2PR04CA0069.apcprd04.prod.outlook.com (2603:1096:202:15::13) To DB8PR04MB6747.eurprd04.prod.outlook.com (2603:10a6:10:10b::31) MIME-Version: 1.0 Received: from localhost.localdomain (119.31.174.73) by HK2PR04CA0069.apcprd04.prod.outlook.com (2603:1096:202:15::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2729.24 via Frontend Transport; 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This patch is to enable these platforms to implement theirs. Signed-off-by: Hou Zhiqiang Reviewed-by: Andrew Murray --- V10: - No change drivers/pci/controller/mobiveil/pcie-mobiveil.c | 3 +++ drivers/pci/controller/mobiveil/pcie-mobiveil.h | 5 +++++ 2 files changed, 8 insertions(+) diff --git a/drivers/pci/controller/mobiveil/pcie-mobiveil.c b/drivers/pci/controller/mobiveil/pcie-mobiveil.c index 2773f823c9ea..b9ed2d95641c 100644 --- a/drivers/pci/controller/mobiveil/pcie-mobiveil.c +++ b/drivers/pci/controller/mobiveil/pcie-mobiveil.c @@ -125,6 +125,9 @@ void mobiveil_csr_write(struct mobiveil_pcie *pcie, u32 val, u32 off, bool mobiveil_pcie_link_up(struct mobiveil_pcie *pcie) { + if (pcie->ops->link_up) + return pcie->ops->link_up(pcie); + return (mobiveil_csr_readl(pcie, LTSSM_STATUS) & LTSSM_STATUS_L0_MASK) == LTSSM_STATUS_L0; } diff --git a/drivers/pci/controller/mobiveil/pcie-mobiveil.h b/drivers/pci/controller/mobiveil/pcie-mobiveil.h index 0e6b5468c026..346bf79a581b 100644 --- a/drivers/pci/controller/mobiveil/pcie-mobiveil.h +++ b/drivers/pci/controller/mobiveil/pcie-mobiveil.h @@ -148,6 +148,10 @@ struct mobiveil_root_port { struct pci_host_bridge *bridge; }; +struct mobiveil_pab_ops { + int (*link_up)(struct mobiveil_pcie *pcie); +}; + struct mobiveil_pcie { struct platform_device *pdev; void __iomem *csr_axi_slave_base; /* root port config base */ @@ -157,6 +161,7 @@ struct mobiveil_pcie { int ppio_wins; int ob_wins_configured; /* configured outbound windows */ int ib_wins_configured; /* configured inbound windows */ + const struct mobiveil_pab_ops *ops; struct mobiveil_root_port rp; };