From patchwork Fri Nov 4 23:22:36 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Christophe Dubois X-Patchwork-Id: 123716 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id A8466B6F98 for ; Sat, 5 Nov 2011 10:24:01 +1100 (EST) Received: from localhost ([::1]:56773 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RMT74-0006gb-Ax for incoming@patchwork.ozlabs.org; Fri, 04 Nov 2011 19:23:54 -0400 Received: from eggs.gnu.org ([140.186.70.92]:32857) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RMT6y-0006gV-Hl for qemu-devel@nongnu.org; Fri, 04 Nov 2011 19:23:49 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RMT6w-0005dM-Pi for qemu-devel@nongnu.org; Fri, 04 Nov 2011 19:23:48 -0400 Received: from smtp4-g21.free.fr ([212.27.42.4]:46843) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RMT6w-0005cj-4G for qemu-devel@nongnu.org; Fri, 04 Nov 2011 19:23:46 -0400 Received: from localhost.localdomain (unknown [78.235.240.156]) by smtp4-g21.free.fr (Postfix) with ESMTP id 59D9F4C811F; Sat, 5 Nov 2011 00:23:40 +0100 (CET) From: Jean-Christophe DUBOIS To: qemu-devel@nongnu.org Date: Sat, 5 Nov 2011 00:22:36 +0100 Message-Id: <1320448956-14162-1-git-send-email-jcd@tribudubois.net> X-Mailer: git-send-email 1.7.5.4 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 3) X-Received-From: 212.27.42.4 Cc: peter.maydell@linaro.org, paul@codesourcery.com, Jean-Christophe DUBOIS Subject: [Qemu-devel] [PATCH] Fix reset bit for realview platform. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org According to realview documentation [1], the bit used to reset the board is bit 2 and not bit 8. This is also in sync with Linux source code [2]. [1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0417d/BBACIGAD.html [2] http://lxr.free-electrons.com/source/arch/arm/mach-realview/realview_pba8.c#L274 Signed-off-by: Jean-Christophe DUBOIS --- hw/arm_sysctl.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/hw/arm_sysctl.c b/hw/arm_sysctl.c index 17cf6f7..aef271e 100644 --- a/hw/arm_sysctl.c +++ b/hw/arm_sysctl.c @@ -237,7 +237,7 @@ static void arm_sysctl_write(void *opaque, target_phys_addr_t offset, } if (s->lockval == LOCK_VALUE) { s->resetlevel = val; - if (val & 0x100) + if (val & 0x04) qemu_system_reset_request (); } break;