[cris-decc0,8/14] cris: Enable movhi and movqi to set condition codes. Anonymize.
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Message ID 202002120659.01C6xVTV026775@ignucius.se.axis.com
State New
Headers show
Series
  • Untitled series #158021
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Commit Message

Hans-Peter Nilsson Feb. 12, 2020, 6:59 a.m. UTC
* config/cris/cris.md ("anz", "anzvc", "acc"): New define_subst_attrs.
("<acc><anz><anzvc>movhi<setcc><setnz><setnzvc>"): Rename from
"movhi".  Rename "cc" attribute to "cc<cccc><ccnz><ccnzvc>".
("<acc><anz><anzvc>movqi<setcc><setnz><setnzvc>"): Similar from
"movqi".  Correct contents of, and rename "cc" attribute to
"cc<cccc><ccnz><ccnzvc>".
("*b<zcond:code><mode>"): Rename from "b<zcond:code><mode>".
("*b<nzvccond:code><mode>"): Rename from "b<nzvccond:code><mode>".
("*b<rnzcond:code><mode>"): Rename from "*b<rnzcond:code><mode>".

Like with movsi_internal.  Looks like the "cc" attribute didn't
need tweaking for "movhi", but did for "movqi".  N.B.: disabled
alternatives make cause a later alternative to match.

Also, non-anonymous insns get declarations and gen_* functions.
We don't want that; even if it doesn't affect generated code
it's sloppy.  (This may or may not be preferable to the
name decorations obfuscating standard pattern names.)

Also anonymize left-over non-anonymous branches; they haven't
been needing names since the cbranch pattern was made the
generic method.
---
 gcc/config/cris/cris.md | 18 +++++++++++-------
 1 file changed, 11 insertions(+), 7 deletions(-)

Patch
diff mbox series

diff --git a/gcc/config/cris/cris.md b/gcc/config/cris/cris.md
index bee9e9735..5f77bc9e0 100644
--- a/gcc/config/cris/cris.md
+++ b/gcc/config/cris/cris.md
@@ -239,6 +239,7 @@  (define_code_attr xCC [(eq "CC") (ne "CC") (gtu "CC") (ltu "CC_NZVC")
 
 (define_subst_attr "setnz" "setnz_subst" "" "_setnz")
 (define_subst_attr "ccnz" "setnz_subst" "" "_enabled")
+(define_subst_attr "anz" "setnz_subst" "" "*")
 
 (define_subst "setnz_subst"
   [(set (match_operand 0)
@@ -251,6 +252,7 @@  (define_subst "setnz_subst"
 
 (define_subst_attr "setnzvc" "setnzvc_subst" "" "_setnzvc")
 (define_subst_attr "ccnzvc" "setnzvc_subst" "" "_enabled")
+(define_subst_attr "anzvc" "setnzvc_subst" "" "*")
 
 (define_subst "setnzvc_subst"
   [(set (match_operand 0)
@@ -263,6 +265,7 @@  (define_subst "setnzvc_subst"
 
 (define_subst_attr "setcc" "setcc_subst" "" "_setcc")
 (define_subst_attr "cccc" "setcc_subst" "" "_enabled")
+(define_subst_attr "acc" "setcc_subst" "" "*")
 
 (define_subst "setcc_subst"
   [(set (match_operand 0)
@@ -609,7 +612,7 @@  (define_insn "*movsi_internal<setcc><setnz><setnzvc>"
 
 ;; FIXME: See movsi.
 
-(define_insn "movhi"
+(define_insn "<acc><anz><anzvc>movhi<setcc><setnz><setnzvc>"
   [(set
     (match_operand:HI 0 "nonimmediate_operand" "=r,r, r,Q>,r,Q>,r,r,r,g,g,r,r,x")
     (match_operand:HI 1 "general_operand"	"r,Q>,M,M, I,r, L,O,n,M,r,g,x,r"))
@@ -649,7 +652,7 @@  (define_insn "movhi"
   }
 }
   [(set_attr "slottable" "yes,yes,yes,yes,yes,yes,no,yes,no,no,no,no,yes,yes")
-   (set_attr "cc" "*,*,none,none,*,none,*,clobber,*,none,none,*,none,none")])
+   (set_attr "cc<cccc><ccnz><ccnzvc>" "*,*,none,none,*,none,*,clobber,*,none,none,*,none,none")])
 
 (define_insn "movstricthi"
   [(set
@@ -685,7 +688,7 @@  (define_expand "reload_out<mode>"
   ""
   "")
 
-(define_insn "movqi"
+(define_insn "<acc><anz><anzvc>movqi<setcc><setnz><setnzvc>"
   [(set (match_operand:QI 0 "nonimmediate_operand" "=r,Q>,r, r,Q>,r,g,g,r,r,r,x")
 	(match_operand:QI 1 "general_operand"	    "r,r, Q>,M,M, I,M,r,O,g,x,r"))
    (clobber (reg:CC CRIS_CC0_REGNUM))]
@@ -704,7 +707,8 @@  (define_insn "movqi"
    move %1,%0
    move %1,%0"
   [(set_attr "slottable" "yes,yes,yes,yes,yes,yes,no,no,yes,no,yes,yes")
-   (set_attr "cc" "*,*,*,*,*,*,*,*,clobber,*,none,none")])
+   (set_attr "cc<cccc><ccnz><ccnzvc>"
+	     "*,none,*,none,none,*,none,none,clobber,*,none,none")])
 
 (define_insn "movstrictqi"
   [(set (strict_low_part
@@ -2117,7 +2121,7 @@  (define_insn_and_split "*cbranch<mode>4_btstq<CC>"
 ;; e.g. m68k, so we have to check if overflow bit is set on all "signed"
 ;; conditions.
 
-(define_insn "b<zcond:code><mode>"
+(define_insn "*b<zcond:code><mode>"
   [(set (pc)
 	(if_then_else (zcond (reg:NZUSE CRIS_CC0_REGNUM)
 			     (const_int 0))
@@ -2127,7 +2131,7 @@  (define_insn "b<zcond:code><mode>"
   "b<CC> %l0%#"
   [(set_attr "slottable" "has_slot")])
 
-(define_insn "b<nzvccond:code><mode>"
+(define_insn "*b<nzvccond:code><mode>"
   [(set (pc)
 	(if_then_else (nzvccond (reg:NZVCUSE CRIS_CC0_REGNUM)
 			     (const_int 0))
@@ -2137,7 +2141,7 @@  (define_insn "b<nzvccond:code><mode>"
   "b<CC> %l0%#"
   [(set_attr "slottable" "has_slot")])
 
-(define_insn "b<rnzcond:code><mode>"
+(define_insn "*b<rnzcond:code><mode>"
   [(set (pc)
 	(if_then_else (rnzcond (reg:NZUSE CRIS_CC0_REGNUM)
 			     (const_int 0))