From patchwork Mon Feb 10 19:20:35 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adhemerval Zanella Netto X-Patchwork-Id: 1235973 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=sourceware.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=libc-alpha-return-109396-incoming=patchwork.ozlabs.org@sourceware.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; secure) header.d=sourceware.org header.i=@sourceware.org header.a=rsa-sha1 header.s=default header.b=VKSfCjDa; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=OQnWjv2F; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48GbQk03ZVz9sPJ for ; Tue, 11 Feb 2020 06:22:53 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=QJUfWcS5Rhtd7zm42fA66rhtJjMs11R D0xpo/NwIpz2T4qV6L2iuXFnhfL6F5oKTwM+iy7gkaCzaHWFW4COZ6Y11ps7lm8W ieaYzF3tAiQcmrSkhg35IZh7hyxhI6OhiE5MqO5kBOjQFSO7qlXl6ljxQUJuNKx1 hOaqMVKgI/Uw= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id:in-reply-to :references; s=default; bh=a4JErfIbudXU2j7f6bPQdjmGeZU=; b=VKSfC jDa5W/ldRJokEyyvmzaKghCwhMljBRrZnYhSGvRhiJc2BoUczNsO5fepbPaQdLxV xfGpvMQE/Rvq1UKP67RsvnLYElm+DbXCr7tXWGwkgSSh8ZF/XNdlx7DnkKIsdyJg Ghp1bPC84CvOs0wrxKS8MBzaDW4pThz9q3k3oY= Received: (qmail 100955 invoked by alias); 10 Feb 2020 19:21:01 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 100885 invoked by uid 89); 10 Feb 2020 19:21:01 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-22.1 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_PASS autolearn=ham version=3.3.1 spammy= X-HELO: mail-qk1-f193.google.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references; bh=yHRlOLuz+g7J/taK0JyoH+VC7TAga3tawV/6ybHcTjQ=; b=OQnWjv2FtjDUdghv09L5Gynq5vJBYlr7APcE0RBRl2OKGNKxjg/Rp+KGkx9CkumnDe RSQ5Bixe8UtwsyZbcGmESTEZ/KAkSP9mCh+vcCKfyn8kvuwFfoKP+QOb2IyfSDv2TDgz BMT7Eep5Lnutgva6Ki9vhh/+RUedPMTrJWCbyIvvREETMENSZ353MoG700hHxke3dIXt qQHU2RRPPk3avFpdUha6fEYwOWXy1USRzKmLc+7mJBM+bIweEKYiUEBM+fwptVd5qtVS +MxaA8K+gbQQNegmaAVICxiSei9FFawm7/SPnte8pE6QWoafAQfagFfu+9iJVqQ4J+Ed Bxow== From: Adhemerval Zanella To: libc-alpha@sourceware.org Subject: [PATCH 12/15] sparc: Avoid clobbering register parameters in syscall Date: Mon, 10 Feb 2020 16:20:35 -0300 Message-Id: <20200210192038.23588-12-adhemerval.zanella@linaro.org> In-Reply-To: <20200210192038.23588-1-adhemerval.zanella@linaro.org> References: <20200210192038.23588-1-adhemerval.zanella@linaro.org> The sparc INTERNAL_SYSCALL macro might clobber the register parameter if the argument itself might clobber any register (a function call for instance). This patch fixes it by using temporary variables for the expressions between the register assignments (as indicated by GCC documentation, 6.47.5.2 Specifying Registers for Local Variables). It is similar to the fix done for MIPS (BZ#25523). Checked on sparc64-linux-gnu and sparcv9-linux-gnu. --- sysdeps/unix/sysv/linux/sparc/sysdep.h | 78 +++++++++++++++++--------- 1 file changed, 52 insertions(+), 26 deletions(-) diff --git a/sysdeps/unix/sysv/linux/sparc/sysdep.h b/sysdeps/unix/sysv/linux/sparc/sysdep.h index 67efa6f029..e2a12349a1 100644 --- a/sysdeps/unix/sysv/linux/sparc/sysdep.h +++ b/sysdeps/unix/sysv/linux/sparc/sysdep.h @@ -87,8 +87,9 @@ #define internal_syscall1(string,err,name,arg1) \ ({ \ + long _arg1 = (long) (arg1); \ register long __err __asm__("g1") = (name); \ - register long __o0 __asm__ ("o0") = (long)(arg1); \ + register long __o0 __asm__ ("o0") = _arg1; \ __asm __volatile (string : "=r" (__err), "=r" (__o0) : \ "0" (__err), "1" (__o0) : \ __SYSCALL_CLOBBERS); \ @@ -97,9 +98,11 @@ #define internal_syscall2(string,err,name,arg1,arg2) \ ({ \ + long _arg1 = (long) (arg1); \ + long _arg2 = (long) (arg2); \ register long __err __asm__("g1") = (name); \ - register long __o0 __asm__ ("o0") = (long)(arg1); \ - register long __o1 __asm__ ("o1") = (long)(arg2); \ + register long __o0 __asm__ ("o0") = _arg1; \ + register long __o1 __asm__ ("o1") = _arg2; \ __asm __volatile (string : "=r" (__err), "=r" (__o0) : \ "0" (__err), "1" (__o0), "r" (__o1) : \ __SYSCALL_CLOBBERS); \ @@ -108,10 +111,13 @@ #define internal_syscall3(string,err,name,arg1,arg2,arg3) \ ({ \ + long _arg1 = (long) (arg1); \ + long _arg2 = (long) (arg2); \ + long _arg3 = (long) (arg3); \ register long __err __asm__("g1") = (name); \ - register long __o0 __asm__ ("o0") = (long)(arg1); \ - register long __o1 __asm__ ("o1") = (long)(arg2); \ - register long __o2 __asm__ ("o2") = (long)(arg3); \ + register long __o0 __asm__ ("o0") = _arg1; \ + register long __o1 __asm__ ("o1") = _arg2; \ + register long __o2 __asm__ ("o2") = _arg3; \ __asm __volatile (string : "=r" (__err), "=r" (__o0) : \ "0" (__err), "1" (__o0), "r" (__o1), \ "r" (__o2) : \ @@ -121,11 +127,15 @@ #define internal_syscall4(string,err,name,arg1,arg2,arg3,arg4) \ ({ \ + long _arg1 = (long) (arg1); \ + long _arg2 = (long) (arg2); \ + long _arg3 = (long) (arg3); \ + long _arg4 = (long) (arg4); \ register long __err __asm__("g1") = (name); \ - register long __o0 __asm__ ("o0") = (long)(arg1); \ - register long __o1 __asm__ ("o1") = (long)(arg2); \ - register long __o2 __asm__ ("o2") = (long)(arg3); \ - register long __o3 __asm__ ("o3") = (long)(arg4); \ + register long __o0 __asm__ ("o0") = _arg1; \ + register long __o1 __asm__ ("o1") = _arg2; \ + register long __o2 __asm__ ("o2") = _arg3; \ + register long __o3 __asm__ ("o3") = _arg4; \ __asm __volatile (string : "=r" (__err), "=r" (__o0) : \ "0" (__err), "1" (__o0), "r" (__o1), \ "r" (__o2), "r" (__o3) : \ @@ -135,12 +145,17 @@ #define internal_syscall5(string,err,name,arg1,arg2,arg3,arg4,arg5) \ ({ \ + long _arg1 = (long) (arg1); \ + long _arg2 = (long) (arg2); \ + long _arg3 = (long) (arg3); \ + long _arg4 = (long) (arg4); \ + long _arg5 = (long) (arg5); \ register long __err __asm__("g1") = (name); \ - register long __o0 __asm__ ("o0") = (long)(arg1); \ - register long __o1 __asm__ ("o1") = (long)(arg2); \ - register long __o2 __asm__ ("o2") = (long)(arg3); \ - register long __o3 __asm__ ("o3") = (long)(arg4); \ - register long __o4 __asm__ ("o4") = (long)(arg5); \ + register long __o0 __asm__ ("o0") = _arg1; \ + register long __o1 __asm__ ("o1") = _arg2; \ + register long __o2 __asm__ ("o2") = _arg3; \ + register long __o3 __asm__ ("o3") = _arg4; \ + register long __o4 __asm__ ("o4") = _arg5; \ __asm __volatile (string : "=r" (__err), "=r" (__o0) : \ "0" (__err), "1" (__o0), "r" (__o1), \ "r" (__o2), "r" (__o3), "r" (__o4) : \ @@ -150,13 +165,19 @@ #define internal_syscall6(string,err,name,arg1,arg2,arg3,arg4,arg5,arg6)\ ({ \ + long _arg1 = (long) (arg1); \ + long _arg2 = (long) (arg2); \ + long _arg3 = (long) (arg3); \ + long _arg4 = (long) (arg4); \ + long _arg5 = (long) (arg5); \ + long _arg6 = (long) (arg6); \ register long __err __asm__("g1") = (name); \ - register long __o0 __asm__ ("o0") = (long)(arg1); \ - register long __o1 __asm__ ("o1") = (long)(arg2); \ - register long __o2 __asm__ ("o2") = (long)(arg3); \ - register long __o3 __asm__ ("o3") = (long)(arg4); \ - register long __o4 __asm__ ("o4") = (long)(arg5); \ - register long __o5 __asm__ ("o5") = (long)(arg6); \ + register long __o0 __asm__ ("o0") = _arg1; \ + register long __o1 __asm__ ("o1") = _arg2; \ + register long __o2 __asm__ ("o2") = _arg3; \ + register long __o3 __asm__ ("o3") = _arg4; \ + register long __o4 __asm__ ("o4") = _arg5; \ + register long __o5 __asm__ ("o5") = _arg6; \ __asm __volatile (string : "=r" (__err), "=r" (__o0) : \ "0" (__err), "1" (__o0), "r" (__o1), \ "r" (__o2), "r" (__o3), "r" (__o4), \ @@ -167,11 +188,16 @@ #define INLINE_CLONE_SYSCALL(arg1,arg2,arg3,arg4,arg5) \ ({ \ - register long __o0 __asm__ ("o0") = (long)(arg1); \ - register long __o1 __asm__ ("o1") = (long)(arg2); \ - register long __o2 __asm__ ("o2") = (long)(arg3); \ - register long __o3 __asm__ ("o3") = (long)(arg4); \ - register long __o4 __asm__ ("o4") = (long)(arg5); \ + long _arg1 = (long) (arg1); \ + long _arg2 = (long) (arg2); \ + long _arg3 = (long) (arg3); \ + long _arg4 = (long) (arg4); \ + long _arg5 = (long) (arg5); \ + register long __o0 __asm__ ("o0") = _arg1; \ + register long __o1 __asm__ ("o1") = _arg2; \ + register long __o2 __asm__ ("o2") = _arg3; \ + register long __o3 __asm__ ("o3") = _arg4; \ + register long __o4 __asm__ ("o4") = _arg5; \ register long __g1 __asm__ ("g1") = __NR_clone; \ __asm __volatile (__SYSCALL_STRING : \ "=r" (__g1), "=r" (__o0), "=r" (__o1) : \