[3/4] mtd: rawnand: cadence: change bad block marker size
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Message ID 1581328530-29966-3-git-send-email-piotrs@cadence.com
State New
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Series
  • [1/4] mtd: rawnand: cadence: get meta data size from registers
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Commit Message

Piotr Sroka Feb. 10, 2020, 9:55 a.m. UTC
Increase bad block marker size from one byte to two bytes.
Bad block marker is handled by skip bytes feature of HPNFC.
Controller excpects this value to be an even number.

Signed-off-by: Piotr Sroka <piotrs@cadence.com>
---
 drivers/mtd/nand/raw/cadence-nand-controller.c | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)

Comments

Miquel Raynal Feb. 18, 2020, 10:47 a.m. UTC | #1
Hi Piotr,

Piotr Sroka <piotrs@cadence.com> wrote on Mon, 10 Feb 2020 10:55:27
+0100:

> Increase bad block marker size from one byte to two bytes.
> Bad block marker is handled by skip bytes feature of HPNFC.
> Controller excpects this value to be an even number.

             expects

Do we break existing users with this change? Do you know how the
controller behaved until now?

Also needs a Fixes/stable tag I guess?

> 
> Signed-off-by: Piotr Sroka <piotrs@cadence.com>
> ---
>  drivers/mtd/nand/raw/cadence-nand-controller.c | 9 +++------
>  1 file changed, 3 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/mtd/nand/raw/cadence-nand-controller.c b/drivers/mtd/nand/raw/cadence-nand-controller.c
> index 2ebfd0934739..5c1bbb05ab51 100644
> --- a/drivers/mtd/nand/raw/cadence-nand-controller.c
> +++ b/drivers/mtd/nand/raw/cadence-nand-controller.c
> @@ -2612,12 +2612,9 @@ int cadence_nand_attach_chip(struct nand_chip *chip)
>  	chip->options |= NAND_NO_SUBPAGE_WRITE;
>  
>  	cdns_chip->bbm_offs = chip->badblockpos;
> -	if (chip->options & NAND_BUSWIDTH_16) {
> -		cdns_chip->bbm_offs &= ~0x01;
> -		cdns_chip->bbm_len = 2;
> -	} else {
> -		cdns_chip->bbm_len = 1;
> -	}
> +	cdns_chip->bbm_offs &= ~0x01;
> +	/* this value should be even number */
> +	cdns_chip->bbm_len = 2;
>  
>  	ret = nand_ecc_choose_conf(chip,
>  				   &cdns_ctrl->ecc_caps,

Thanks,
Miquèl

Patch
diff mbox series

diff --git a/drivers/mtd/nand/raw/cadence-nand-controller.c b/drivers/mtd/nand/raw/cadence-nand-controller.c
index 2ebfd0934739..5c1bbb05ab51 100644
--- a/drivers/mtd/nand/raw/cadence-nand-controller.c
+++ b/drivers/mtd/nand/raw/cadence-nand-controller.c
@@ -2612,12 +2612,9 @@  int cadence_nand_attach_chip(struct nand_chip *chip)
 	chip->options |= NAND_NO_SUBPAGE_WRITE;
 
 	cdns_chip->bbm_offs = chip->badblockpos;
-	if (chip->options & NAND_BUSWIDTH_16) {
-		cdns_chip->bbm_offs &= ~0x01;
-		cdns_chip->bbm_len = 2;
-	} else {
-		cdns_chip->bbm_len = 1;
-	}
+	cdns_chip->bbm_offs &= ~0x01;
+	/* this value should be even number */
+	cdns_chip->bbm_len = 2;
 
 	ret = nand_ecc_choose_conf(chip,
 				   &cdns_ctrl->ecc_caps,