@@ -9257,6 +9257,15 @@ rs6000_emit_set_long_const (rtx dest, HOST_WIDE_INT c)
gen_lowpart (SImode,
copy_rtx (temp))));
}
+ else if (ud1 == ud3 && ud2 == ud4)
+ {
+ temp = !can_create_pseudo_p () ? dest : gen_reg_rtx (DImode);
+ HOST_WIDE_INT num = (ud2 << 16) | ud1;
+ rs6000_emit_set_long_const (temp, (num ^ 0x80000000) - 0x80000000);
+ rtx one = gen_rtx_AND (DImode, temp, GEN_INT (0xffffffff));
+ rtx two = gen_rtx_ASHIFT (DImode, temp, GEN_INT (32));
+ emit_move_insn (dest, gen_rtx_IOR (DImode, one, two));
+ }
else if ((ud4 == 0xffff && (ud3 & 0x8000))
|| (ud4 == 0 && ! (ud3 & 0x8000)))
{
new file mode 100644
@@ -0,0 +1,13 @@
+/* PR target/93012 */
+/* { dg-do compile { target lp64 } } */
+/* { dg-options "-O2 -std=c99" } */
+
+unsigned long long msk66() { return 0x6666666666666666ULL; }
+unsigned long long mskih() { return 0xabcd1234abcd1234ULL; }
+unsigned long long mskh0() { return 0x0000123400001234ULL; }
+unsigned long long mskl0() { return 0xabcd0000abcd0000ULL; }
+unsigned long long mskh1() { return 0xffff9234ffff9234ULL; }
+unsigned long long mskl1() { return 0x2bcdffff2bcdffffULL; }
+unsigned long long mskse() { return 0xffff1234ffff1234ULL; }
+
+/* { dg-final { scan-assembler-times {\mrldimi\M} 7 } } */