Message ID | a87670f154ee8fd1cf670c79880c26232aaeab7f.camel@vnet.ibm.com |
---|---|
State | New |
Headers | show |
Series | add -mvsx to pr92923-1.c test requiring vsx | expand |
Hi Will, On Thu, Feb 06, 2020 at 11:41:47AM -0600, will schmidt wrote: > The existing testcase pr92923-1.c uses vector long long, and thus > requires vsx. > OK for master? Sure! Thanks for the patch. > * testsuite/gcc.target/powerpc/pr92923-1.c: Add -mvsx. The changelog is testsuite/ChangeLog, so entries there do not have "testsuite/" in it. Segher
diff --git a/gcc/testsuite/gcc.target/powerpc/pr92923-1.c b/gcc/testsuite/gcc.target/powerpc/pr92923-1.c index f901244..262f1a1 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr92923-1.c +++ b/gcc/testsuite/gcc.target/powerpc/pr92923-1.c @@ -1,8 +1,8 @@ /* { dg-do compile } */ -/* { dg-require-effective-target powerpc_altivec_ok } */ -/* { dg-options "-maltivec -O2 -fdump-tree-gimple" } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-mvsx -O2 -fdump-tree-gimple" } */ /* Verify that overloaded built-ins for "and", "andc", "nor", "or" and "xor" do not produce VIEW_CONVERT_EXPR operations on their operands. Like so: _1 = VIEW_CONVERT_EXPR<__vector signed int>(x);