Patchwork [i386] : Use reg_or_subregno in int->float splitters

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Submitter Uros Bizjak
Date Nov. 1, 2011, 10:41 p.m.
Message ID <CAFULd4bEbdQ7TLTHn=J4sWmmP6hw=9zYqurpBv7CFSO_jjQ5bQ@mail.gmail.com>
Download mbox | patch
Permalink /patch/123149/
State New
Headers show

Comments

Uros Bizjak - Nov. 1, 2011, 10:41 p.m.
On Tue, Nov 1, 2011 at 11:00 PM, Jakub Jelinek <jakub@redhat.com> wrote:
> On Tue, Nov 01, 2011 at 10:33:07PM +0100, Uros Bizjak wrote:
>> We have a nice utility function that can be used in int->float
>> splitter constraints.
>>
>> 2011-11-01  Uros Bizjak  <ubizjak@gmail.com>
>>
>>       * config/i386/i386.md (splitters for int-float conversion): Use
>>       reg_or_subregno in splitter constraints.
>>
>> Bootstrapped and regression tested on x86_64-pc-linux-gnu {,-m32},
>> committed to mainline SVN.
>
> Unfortunately reg_or_subregno is an external non-inline function,
> doesn't have pure attribute and SSE_REGNO_P macro evaluates its argument
> twice, which means the function is called multiple times.

You are right. :(

On a second look, we are missing SUBREG_REG on subregs, the constraint
should read:

   && (SSE_REG_P (operands[0])
       || (GET_CODE (operands[0]) == SUBREG
	   && SSE_REG_P (SUBREG_REG (operands[0])))

I will do a partial revert with additional fix.

2011-11-01  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/i386.md (splitters for int-float conversion): Use
	SUBREG_REG on SUBREGs in splitter constraints.


Bootstrap and regression test in progress.

Thanks,
Uros.

Patch

Index: i386.md
===================================================================
--- i386.md	(revision 180745)
+++ i386.md	(working copy)
@@ -4920,7 +4920,9 @@ 
    && SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_MIX_SSE_I387
    && TARGET_INTER_UNIT_CONVERSIONS
    && reload_completed
-   && SSE_REGNO_P (reg_or_subregno (operands[0]))"
+   && (SSE_REG_P (operands[0])
+       || (GET_CODE (operands[0]) == SUBREG
+	   && SSE_REG_P (SUBREG_REG (operands[0]))))"
   [(set (match_dup 0) (float:MODEF (match_dup 1)))])
 
 (define_split
@@ -4931,7 +4933,9 @@ 
    && SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_MIX_SSE_I387
    && !(TARGET_INTER_UNIT_CONVERSIONS || optimize_function_for_size_p (cfun))
    && reload_completed
-   && SSE_REGNO_P (reg_or_subregno (operands[0]))"
+   && (SSE_REG_P (operands[0])
+       || (GET_CODE (operands[0]) == SUBREG
+	   && SSE_REG_P (SUBREG_REG (operands[0]))))"
   [(set (match_dup 2) (match_dup 1))
    (set (match_dup 0) (float:MODEF (match_dup 2)))])
 
@@ -5020,7 +5024,9 @@ 
   "TARGET_SSE2 && TARGET_SSE_MATH
    && TARGET_USE_VECTOR_CONVERTS && optimize_function_for_speed_p (cfun)
    && reload_completed
-   && SSE_REGNO_P (reg_or_subregno (operands[0]))"
+   && (SSE_REG_P (operands[0])
+       || (GET_CODE (operands[0]) == SUBREG
+	   && SSE_REG_P (SUBREG_REG (operands[0]))))"
   [(const_int 0)]
 {
   rtx op1 = operands[1];
@@ -5061,7 +5067,9 @@ 
   "TARGET_SSE2 && TARGET_SSE_MATH
    && TARGET_USE_VECTOR_CONVERTS && optimize_function_for_speed_p (cfun)
    && reload_completed
-   && SSE_REGNO_P (reg_or_subregno (operands[0]))"
+   && (SSE_REG_P (operands[0])
+       || (GET_CODE (operands[0]) == SUBREG
+	   && SSE_REG_P (SUBREG_REG (operands[0]))))"
   [(const_int 0)]
 {
   operands[3] = simplify_gen_subreg (<ssevecmode>mode, operands[0],
@@ -5083,7 +5091,9 @@ 
   "TARGET_SSE2 && TARGET_SSE_MATH
    && TARGET_USE_VECTOR_CONVERTS && optimize_function_for_speed_p (cfun)
    && reload_completed
-   && SSE_REGNO_P (reg_or_subregno (operands[0]))"
+   && (SSE_REG_P (operands[0])
+       || (GET_CODE (operands[0]) == SUBREG
+	   && SSE_REG_P (SUBREG_REG (operands[0]))))"
   [(const_int 0)]
 {
   rtx op1 = operands[1];
@@ -5127,7 +5137,9 @@ 
   "TARGET_SSE2 && TARGET_SSE_MATH
    && TARGET_USE_VECTOR_CONVERTS && optimize_function_for_speed_p (cfun)
    && reload_completed
-   && SSE_REGNO_P (reg_or_subregno (operands[0]))"
+   && (SSE_REG_P (operands[0])
+       || (GET_CODE (operands[0]) == SUBREG
+	   && SSE_REG_P (SUBREG_REG (operands[0]))))"
   [(const_int 0)]
 {
   operands[3] = simplify_gen_subreg (<ssevecmode>mode, operands[0],
@@ -5188,7 +5200,9 @@ 
    && SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH
    && (TARGET_INTER_UNIT_CONVERSIONS || optimize_function_for_size_p (cfun))
    && reload_completed
-   && SSE_REGNO_P (reg_or_subregno (operands[0]))"
+   && (SSE_REG_P (operands[0])
+       || (GET_CODE (operands[0]) == SUBREG
+	   && SSE_REG_P (SUBREG_REG (operands[0]))))"
   [(set (match_dup 0) (float:MODEF (match_dup 1)))])
 
 (define_insn "*float<SWI48x:mode><MODEF:mode>2_sse_nointerunit"
@@ -5221,7 +5235,9 @@ 
    && SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH
    && !(TARGET_INTER_UNIT_CONVERSIONS || optimize_function_for_size_p (cfun))
    && reload_completed
-   && SSE_REGNO_P (reg_or_subregno (operands[0]))"
+   && (SSE_REG_P (operands[0])
+       || (GET_CODE (operands[0]) == SUBREG
+	   && SSE_REG_P (SUBREG_REG (operands[0]))))"
   [(set (match_dup 2) (match_dup 1))
    (set (match_dup 0) (float:MODEF (match_dup 2)))])
 
@@ -5232,7 +5248,9 @@ 
   "(<SWI48x:MODE>mode != DImode || TARGET_64BIT)
    && SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH
    && reload_completed
-   && SSE_REGNO_P (reg_or_subregno (operands[0]))"
+   && (SSE_REG_P (operands[0])
+       || (GET_CODE (operands[0]) == SUBREG
+	   && SSE_REG_P (SUBREG_REG (operands[0]))))"
   [(set (match_dup 0) (float:MODEF (match_dup 1)))])
 
 (define_insn "*float<SWI48x:mode><X87MODEF:mode>2_i387_with_temp"