From patchwork Tue Nov 1 19:12:18 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jana Rapava X-Patchwork-Id: 123119 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id A5AF9B6F69 for ; Wed, 2 Nov 2011 06:08:58 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 2A6BF294C7; Tue, 1 Nov 2011 20:08:57 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id qOtHvJgeb4vB; Tue, 1 Nov 2011 20:08:56 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 68C25294AE; Tue, 1 Nov 2011 20:08:55 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 28AC8294AE for ; Tue, 1 Nov 2011 20:08:52 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id tmGLjhDK9CYH for ; Tue, 1 Nov 2011 20:08:49 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-fx0-f44.google.com (mail-fx0-f44.google.com [209.85.161.44]) by theia.denx.de (Postfix) with ESMTPS id 7B309294AC for ; Tue, 1 Nov 2011 20:08:48 +0100 (CET) Received: by faas12 with SMTP id s12so6990996faa.3 for ; Tue, 01 Nov 2011 12:08:47 -0700 (PDT) Received: by 10.223.76.11 with SMTP id a11mr2642288fak.1.1320174527431; Tue, 01 Nov 2011 12:08:47 -0700 (PDT) Received: from hex.kolej.mff.cuni.cz (janalaptop.kolej.mff.cuni.cz. [78.128.199.214]) by mx.google.com with ESMTPS id k26sm365997fab.8.2011.11.01.12.08.45 (version=SSLv3 cipher=OTHER); Tue, 01 Nov 2011 12:08:46 -0700 (PDT) From: Jana Rapava To: u-boot@lists.denx.de Date: Tue, 1 Nov 2011 20:12:18 +0100 Message-Id: <1320174738-14976-1-git-send-email-fermata7@gmail.com> X-Mailer: git-send-email 1.7.6.3 Cc: Jana Rapava Subject: [U-Boot] [PATCH] ulpi: add generic ULPI support header file X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Add ULPI header file needed by Efika USB support patchset and generic ULPI support patch, which is to be posted soon. Signed-off-by: Jana Rapava Cc: Marek Vasut Cc: Remy Bohmer Cc: Stefano Babic Cc: Igor Grinberg --- include/usb/ulpi.h | 195 ++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 195 insertions(+), 0 deletions(-) create mode 100644 include/usb/ulpi.h diff --git a/include/usb/ulpi.h b/include/usb/ulpi.h new file mode 100644 index 0000000..4a88b5f --- /dev/null +++ b/include/usb/ulpi.h @@ -0,0 +1,195 @@ +/* + * Copyright (C) 2011 Jana Rapava + * Based on: + * linux/include/linux/usb/ulpi.h + * ULPI defines and function prototypes + * + * Original Copyrights follow: + * Copyright (C) 2010 Nokia Corporation + * + * This software is distributed under the terms of the GNU General + * Public License ("GPL") as published by the Free Software Foundation, + * version 2 of that License. + */ + +#ifndef __USB_ULPI_H +#define __USB_ULPI_H + +#define ULPI_ID_REGS_COUNT 4 +#define ULPI_TEST_VALUE 0x55 +#define ULPI_TIMEOUT 1000 /* some reasonable value */ + +/* ULPI viewport control bits */ +#define ULPI_WU (1 << 31) +#define ULPI_SS (1 << 27) +#define ULPI_RWRUN (1 << 30) +#define ULPI_RWCTRL (1 << 29) + +struct ulpi_regs { + u8 vendor_id_low; /* 0x00 - Vendor ID lower byte */ + u8 vendor_id_high; /* 0x01 - Vendor ID upper byte */ + u8 product_id_low; /* 0x02 - Product ID lower byte */ + u8 product_id_high; /* 0x03 - Product ID higher byte */ + /* Function Control; 0x04 - 0x06 Read, 0x04 Write */ + u8 function_ctrl_write; + u8 function_ctrl_set; /* 0x05 Set */ + u8 function_ctrl_clear; /* 0x06 Clear */ + /* Interface Control; 0x07 - 0x09 Read, 0x07 Write */ + u8 iface_ctrl_write; + u8 iface_ctrl_set; /* 0x08 Set */ + u8 iface_ctrl_clear; /* 0x09 Clear */ + /* OTG Control; 0x0A - 0x0C Read, 0x0A Write */ + u8 otg_ctrl_write; + u8 otg_ctrl_set; /* 0x0B Set */ + u8 otg_ctrl_clear; /* 0x0C Clear */ + /* USB Interrupt Enable Rising; 0x0D - 0x0F Read, 0x0D Write */ + u8 usb_ie_rising_write; + u8 usb_ie_rising_set; /* 0x0E Set */ + u8 usb_ie_rising_clear; /* 0x0F Clear */ + /* USB Interrupt Enable Falling; 0x10 - 0x12 Read, 0x10 Write */ + u8 usb_ie_falling_write; + u8 usb_ie_falling_set; /* 0x11 Set */ + u8 usb_ie_falling_clear; /* 0x12 Clear */ + u8 usb_int_status; /* 0x13 - USB Interrupt Status */ + u8 usb_int_latch; /* 0x14 - USB Interrupt Latch */ + u8 debug; /* 0x15 - Debug */ + /* Scratch Register; 0x16 - 0x18 Read, 0x16 Write */ + u8 scratch_write; + u8 scratch_set; /* 0x17 Set */ + u8 scratch_clear; /* 0x18 Clear */ + /* + * Optional Carkit registers + */ + /* Carkit Control; 0x19 - 0x1B Read, 0x19 Write */ + u8 carkit_ctrl_write; + u8 carkit_ctrl_set; + u8 carkit_ctrl_clear; + /* Carkit Interrupt Delay */ + u8 carkit_int_delay; /* 0x1C Read, Write */ + /* Carkit Interrupt Enable; 0x1D - 0x1F Read, 0x1D Write */ + u8 carkit_ie_write; + u8 carkit_ie_set; + u8 carkit_ie_clear; + u8 carkit_int_status; /* 0x20 - Carkit Interrupt Status */ + u8 carkit_int_latch; /* 0x21 - Carkit Interrupt Latch */ + /* Carkit Pulse Control; 0x22 - 0x24 Read, 0x22 Write */ + u8 carkit_pulse_ctrl_write; + u8 carkit_pulse_ctrl_set; + u8 carkit_pulse_ctrl_clear; + /* + * Other optional registers + */ + u8 transmit_pos_width; /* 0x25 - Transmit Positive Width */ + u8 transmit_neg_width; /* 0x26 - Transmit Negative Width */ + u8 recv_pol_recovery; /* 0x27 - Receive Polarity Recovery */ + /* + * Addresses 0x28 - 0x2E are reserved, so we use offsets + * for immediate registers with higher addresses + */ +}; + +/* Access Extended Register Set (indicator) */ +#define ACCESS_EXT_REGS_OFFSET 0x2f /* read-write */ +/* Vendor-specific */ +#define VENDOR_SPEC_OFFSET 0x30 + +/* + * Extended Register Set + * + * Addresses 0x00-0x3F map directly to Immediate Register Set. + * Addresses 0x40-0x7F are reserved. + * Addresses 0x80-0xff are vendor-specific. + */ +#define EXT_VENDOR_SPEC_OFFSET 0x80 + +/* + * Register Bits + */ + +/* Function Control */ +#define ULPI_FC_XCVRSEL (1 << 0) +#define ULPI_FC_XCVRSEL_MASK (3 << 0) +#define ULPI_FC_HIGH_SPEED (0 << 0) +#define ULPI_FC_FULL_SPEED (1 << 0) +#define ULPI_FC_LOW_SPEED (2 << 0) +#define ULPI_FC_FS4LS (3 << 0) +#define ULPI_FC_TERMSELECT (1 << 2) +#define ULPI_FC_OPMODE (1 << 3) +#define ULPI_FC_OPMODE_MASK (3 << 3) +#define ULPI_FC_OPMODE_NORMAL (0 << 3) +#define ULPI_FC_OPMODE_NONDRIVING (1 << 3) +#define ULPI_FC_OPMODE_DISABLE_NRZI (2 << 3) +#define ULPI_FC_OPMODE_NOSYNC_NOEOP (3 << 3) +#define ULPI_FC_RESET (1 << 5) +#define ULPI_FC_SUSPENDM (1 << 6) + +/* Interface Control */ +#define ULPI_IFACE_6_PIN_SERIAL_MODE (1 << 0) +#define ULPI_IFACE_3_PIN_SERIAL_MODE (1 << 1) +#define ULPI_IFACE_CARKITMODE (1 << 2) +#define ULPI_IFACE_CLOCKSUSPENDM (1 << 3) +#define ULPI_IFACE_AUTORESUME (1 << 4) +#define ULPI_IFACE_EXTVBUS_COMPLEMENT (1 << 5) +#define ULPI_IFACE_PASSTHRU (1 << 6) +#define ULPI_IFACE_PROTECT_IFC_DISABLE (1 << 7) + +/* OTG Control */ +#define ULPI_OTG_ID_PULLUP (1 << 0) +#define ULPI_OTG_DP_PULLDOWN (1 << 1) +#define ULPI_OTG_DM_PULLDOWN (1 << 2) +#define ULPI_OTG_DISCHRGVBUS (1 << 3) +#define ULPI_OTG_CHRGVBUS (1 << 4) +#define ULPI_OTG_DRVVBUS (1 << 5) +#define ULPI_OTG_DRVVBUS_EXT (1 << 6) +#define ULPI_OTG_EXTVBUSIND (1 << 7) + +/* + * USB Interrupt Enable Rising, + * USB Interrupt Enable Falling, + * USB Interrupt Status and + * USB Interrupt Latch + */ +#define ULPI_INT_HOST_DISCONNECT (1 << 0) +#define ULPI_INT_VBUS_VALID (1 << 1) +#define ULPI_INT_SESS_VALID (1 << 2) +#define ULPI_INT_SESS_END (1 << 3) +#define ULPI_INT_IDGRD (1 << 4) + +/* Debug */ +#define ULPI_DEBUG_LINESTATE0 (1 << 0) +#define ULPI_DEBUG_LINESTATE1 (1 << 1) + +/* Carkit Control */ +#define ULPI_CARKIT_CTRL_CARKITPWR (1 << 0) +#define ULPI_CARKIT_CTRL_IDGNDDRV (1 << 1) +#define ULPI_CARKIT_CTRL_TXDEN (1 << 2) +#define ULPI_CARKIT_CTRL_RXDEN (1 << 3) +#define ULPI_CARKIT_CTRL_SPKLEFTEN (1 << 4) +#define ULPI_CARKIT_CTRL_SPKRIGHTEN (1 << 5) +#define ULPI_CARKIT_CTRL_MICEN (1 << 6) + +/* Carkit Interrupt Enable */ +#define ULPI_CARKIT_INT_EN_IDFLOAT_RISE (1 << 0) +#define ULPI_CARKIT_INT_EN_IDFLOAT_FALL (1 << 1) +#define ULPI_CARKIT_INT_EN_CARINTDET (1 << 2) +#define ULPI_CARKIT_INT_EN_DP_RISE (1 << 3) +#define ULPI_CARKIT_INT_EN_DP_FALL (1 << 4) + +/* + * Carkit Interrupt Status and + * Carkit Interrupt Latch + */ +#define ULPI_CARKIT_INT_IDFLOAT (1 << 0) +#define ULPI_CARKIT_INT_CARINTDET (1 << 1) +#define ULPI_CARKIT_INT_DP (1 << 2) + +/* Carkit Pulse Control*/ +#define ULPI_CARKIT_PLS_CTRL_TXPLSEN (1 << 0) +#define ULPI_CARKIT_PLS_CTRL_RXPLSEN (1 << 1) +#define ULPI_CARKIT_PLS_CTRL_SPKRLEFT_BIASEN (1 << 2) +#define ULPI_CARKIT_PLS_CTRL_SPKRRIGHT_BIASEN (1 << 3) + +void ulpi_write(struct usb_ehci *ehci, u32 reg, u32 value); +u32 ulpi_read(struct usb_ehci *ehci, u32 reg); + +#endif /* __USB_ULPI_H */