| Message ID | 1320171397-28477-1-git-send-email-fabio.estevam@freescale.com |
|---|---|
| State | Accepted |
| Commit | 867b96a5b7b1de56181b57bdfb25151c01a0fb3f |
| Delegated to: | Stefano Babic |
| Headers | show |
On 11/01/2011 07:16 PM, Fabio Estevam wrote: > Enable D and I caches on mx31pdk. > > Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> > --- > Stefano, > > You explained that enabling cache may cause some drivers like FEC and MMC not to work properly. > As mx31pdk does not have FEC or MMC driver I thought this should be OK. Ok, understood. > > Tested by booting Linux kernel via TFTP and mounting a NFS rootfs. Good. To be sure, do you have also tested NAND in u-boot ? I do not expect problems, but... > > board/freescale/mx31pdk/mx31pdk.c | 8 ++++++++ > 1 files changed, 8 insertions(+), 0 deletions(-) > > diff --git a/board/freescale/mx31pdk/mx31pdk.c b/board/freescale/mx31pdk/mx31pdk.c > index 9f8bc53..1d7b4f6 100644 > --- a/board/freescale/mx31pdk/mx31pdk.c > +++ b/board/freescale/mx31pdk/mx31pdk.c > @@ -71,11 +71,19 @@ int board_early_init_f(void) > return 0; > } > > +void enable_caches(void) > +{ > + icache_enable(); > + dcache_enable(); > +} > + > int board_init(void) > { > /* adress of boot parameters */ > gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; > > + enable_caches(); > + > return 0; > } > Acked-by: Stefano Babic <sbabic@denx.de> Best regards, Stefano Babic
Hi Stefano, On Wed, Nov 2, 2011 at 6:41 AM, Stefano Babic <sbabic@denx.de> wrote: > Good. To be sure, do you have also tested NAND in u-boot ? I do not > expect problems, but... Yes, I confirmed that NAND works with the caches enabled by doing the following tests: 1. Save environment variables in NAND 2. Reprogram U-boot in NAND using "run prg_uboot" script. I would like to investigate the FEC issue when caches are enabled when I have a chance. Would you have any pointers as to where to start investigating why the FEC driver is buggy when caches are enabled? Thanks, Fabio Estevam
Fabio, 2011/11/3 Fabio Estevam <festevam@gmail.com>: > Hi Stefano, > > On Wed, Nov 2, 2011 at 6:41 AM, Stefano Babic <sbabic@denx.de> wrote: > >> Good. To be sure, do you have also tested NAND in u-boot ? I do not >> expect problems, but... > > Yes, I confirmed that NAND works with the caches enabled by doing the > following tests: > > 1. Save environment variables in NAND > 2. Reprogram U-boot in NAND using "run prg_uboot" script. > > I would like to investigate the FEC issue when caches are enabled when > I have a chance. > > Would you have any pointers as to where to start investigating why the > FEC driver is buggy when caches are enabled? you can search the tread: [U-Boot] i.MX51: FEC: Cache coherency problem? Jason Liu > > Thanks, > > Fabio Estevam > _______________________________________________ > U-Boot mailing list > U-Boot@lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot >
On 11/01/2011 07:16 PM, Fabio Estevam wrote: > Enable D and I caches on mx31pdk. > > Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> > --- > Stefano, > > You explained that enabling cache may cause some drivers like FEC and MMC not to work properly. > As mx31pdk does not have FEC or MMC driver I thought this should be OK. > > Tested by booting Linux kernel via TFTP and mounting a NFS rootfs. > > board/freescale/mx31pdk/mx31pdk.c | 8 ++++++++ > 1 files changed, 8 insertions(+), 0 deletions(-) > > diff --git a/board/freescale/mx31pdk/mx31pdk.c b/board/freescale/mx31pdk/mx31pdk.c > index 9f8bc53..1d7b4f6 100644 > --- a/board/freescale/mx31pdk/mx31pdk.c > +++ b/board/freescale/mx31pdk/mx31pdk.c > @@ -71,11 +71,19 @@ int board_early_init_f(void) > return 0; > } > > +void enable_caches(void) > +{ > + icache_enable(); > + dcache_enable(); > +} > + > int board_init(void) > { > /* adress of boot parameters */ > gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; > > + enable_caches(); > + > return 0; > } > Applied to u-boot-imx, thanks. Best regards, Stefano Babic
diff --git a/board/freescale/mx31pdk/mx31pdk.c b/board/freescale/mx31pdk/mx31pdk.c index 9f8bc53..1d7b4f6 100644 --- a/board/freescale/mx31pdk/mx31pdk.c +++ b/board/freescale/mx31pdk/mx31pdk.c @@ -71,11 +71,19 @@ int board_early_init_f(void) return 0; } +void enable_caches(void) +{ + icache_enable(); + dcache_enable(); +} + int board_init(void) { /* adress of boot parameters */ gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; + enable_caches(); + return 0; }
Enable D and I caches on mx31pdk. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> --- Stefano, You explained that enabling cache may cause some drivers like FEC and MMC not to work properly. As mx31pdk does not have FEC or MMC driver I thought this should be OK. Tested by booting Linux kernel via TFTP and mounting a NFS rootfs. board/freescale/mx31pdk/mx31pdk.c | 8 ++++++++ 1 files changed, 8 insertions(+), 0 deletions(-)