From patchwork Mon Jan 27 16:54:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 1229949 X-Patchwork-Delegate: yamada.m@jp.panasonic.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=socionext.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=nifty.com header.i=@nifty.com header.a=rsa-sha256 header.s=dec2015msa header.b=bE909h16; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 485wqb4kBfz9sRV for ; Tue, 28 Jan 2020 03:55:55 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 515F581A71; Mon, 27 Jan 2020 17:55:51 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=socionext.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=nifty.com header.i=@nifty.com header.b="bE909h16"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 20BEA81A71; Mon, 27 Jan 2020 17:55:50 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, SPF_HELO_NONE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from conuserg-09.nifty.com (conuserg-09.nifty.com [210.131.2.76]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id C8E7E81A76 for ; Mon, 27 Jan 2020 17:55:42 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=socionext.com Authentication-Results: phobos.denx.de; spf=fail smtp.mailfrom=yamada.masahiro@socionext.com Received: from grover.flets-west.jp (softbank126093102113.bbtec.net [126.93.102.113]) (authenticated) by conuserg-09.nifty.com with ESMTP id 00RGswBm023039; Tue, 28 Jan 2020 01:55:00 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-09.nifty.com 00RGswBm023039 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1580144100; bh=SYmvv5ir7tizFUP1Er0nUc6cwsrplUDdhKC5pS+R/ww=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bE909h16EAs/Y8kK5Q1u3uXEM9TQb6h4Cmkd/1pd2zOJcx2AXcKaZiMQDDjE9MUxm 3oj5yC1xKueLSf1RIVuOJ+F+8BjlZkkZr7soDLfC92MRbRvTY0d5hF4ZPGNujfIFQ9 EXdT7VvhSnVluJ0zgUYftZOJ6FHTDtxCzkii/UwXIhDSe6OS2XwkpYk6y1tYUaaBs9 22sV4SP4+YkDlcNvf1zk6PJAdVmkWWeXtMuJiSQIRXiIpKdFPYSZhhglNmXhCaR3vj ex1HNMqdMC9EDuYcXMI4o3cZ5gnoV5xKag+zF/EMwdwuH5FK7Zxc+GHB62hFeZi0Ov 3cNAJubHSjF9Q== X-Nifty-SrcIP: [126.93.102.113] From: Masahiro Yamada To: u-boot@lists.denx.de Subject: [PATCH 3/4] ARM: uniphier: move NAND reset assertion to U-Boot proper from SPL Date: Tue, 28 Jan 2020 01:54:54 +0900 Message-Id: <20200127165455.31753-3-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200127165455.31753-1-yamada.masahiro@socionext.com> References: <20200127165455.31753-1-yamada.masahiro@socionext.com> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.26 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marek Vasut , Tom Rini Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.101.4 at phobos.denx.de X-Virus-Status: Clean The comment /* deassert reset */ is wrong. It asserts the reset. It no longer needs to stay in SPL. The NAND controller reset is handled in the driver. So, this assert can be moved to the board_init() of U-Boot proper. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/board_init.c | 1 + arch/arm/mach-uniphier/clk/Makefile | 2 +- arch/arm/mach-uniphier/clk/clk-early-ld4.c | 7 ------- 3 files changed, 2 insertions(+), 8 deletions(-) diff --git a/arch/arm/mach-uniphier/board_init.c b/arch/arm/mach-uniphier/board_init.c index 99727a3004..ad3427b37b 100644 --- a/arch/arm/mach-uniphier/board_init.c +++ b/arch/arm/mach-uniphier/board_init.c @@ -40,6 +40,7 @@ static const struct uniphier_initdata uniphier_initdata[] = { .soc_id = UNIPHIER_LD4_ID, .sbc_init = uniphier_ld4_sbc_init, .pll_init = uniphier_ld4_pll_init, + .clk_init = uniphier_ld4_clk_init, }, #endif #if defined(CONFIG_ARCH_UNIPHIER_PRO4) diff --git a/arch/arm/mach-uniphier/clk/Makefile b/arch/arm/mach-uniphier/clk/Makefile index c49e44754c..62fb86f86b 100644 --- a/arch/arm/mach-uniphier/clk/Makefile +++ b/arch/arm/mach-uniphier/clk/Makefile @@ -11,7 +11,7 @@ obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += clk-early-ld4.o clk-dram-pxs2.o dpll-pxs2.o else -obj-$(CONFIG_ARCH_UNIPHIER_LD4) += pll-ld4.o dpll-tail.o +obj-$(CONFIG_ARCH_UNIPHIER_LD4) += clk-ld4.o pll-ld4.o dpll-tail.o obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += clk-pro4.o pll-pro4.o dpll-tail.o obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += pll-ld4.o dpll-tail.o obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += clk-pro5.o diff --git a/arch/arm/mach-uniphier/clk/clk-early-ld4.c b/arch/arm/mach-uniphier/clk/clk-early-ld4.c index f32f78dd26..0f9ce65097 100644 --- a/arch/arm/mach-uniphier/clk/clk-early-ld4.c +++ b/arch/arm/mach-uniphier/clk/clk-early-ld4.c @@ -15,13 +15,6 @@ void uniphier_ld4_early_clk_init(void) { u32 tmp; - /* deassert reset */ - if (spl_boot_device() != BOOT_DEVICE_NAND) { - tmp = readl(sc_base + SC_RSTCTRL); - tmp &= ~SC_RSTCTRL_NRST_NAND; - writel(tmp, sc_base + SC_RSTCTRL); - }; - /* provide clocks */ tmp = readl(sc_base + SC_CLKCTRL); tmp |= SC_CLKCTRL_CEN_SBC | SC_CLKCTRL_CEN_PERI;