Patchwork [U-Boot,3/5] powerpc/85xx: add some missing sync instructions in the CCSR relocation code

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Submitter Timur Tabi
Date Oct. 31, 2011, 6:30 p.m.
Message ID <1320085845-10547-3-git-send-email-timur@freescale.com>
Download mbox | patch
Permalink /patch/122907/
State Accepted
Commit 452ad61c3feeffbf2b5ff74f0a6797af3ba4882c
Delegated to: Kumar Gala
Headers show

Comments

Timur Tabi - Oct. 31, 2011, 6:30 p.m.
Calls to tlbwe and tlbsx should be preceded with an isync/msync pair.

Signed-off-by: Timur Tabi <timur@freescale.com>
---
 arch/powerpc/cpu/mpc85xx/start.S |    4 ++++
 1 files changed, 4 insertions(+), 0 deletions(-)
Kumar Gala - Nov. 8, 2011, 2:32 p.m.
On Oct 31, 2011, at 1:30 PM, Timur Tabi wrote:

> Calls to tlbwe and tlbsx should be preceded with an isync/msync pair.
> 
> Signed-off-by: Timur Tabi <timur@freescale.com>
> ---
> arch/powerpc/cpu/mpc85xx/start.S |    4 ++++
> 1 files changed, 4 insertions(+), 0 deletions(-)

applied to 85xx

- k

Patch

diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S
index b5bf1fa..ccb331a 100644
--- a/arch/powerpc/cpu/mpc85xx/start.S
+++ b/arch/powerpc/cpu/mpc85xx/start.S
@@ -363,6 +363,8 @@  purge_old_ccsr_tlb:
 
 	li	r1, 0
 	mtspr	MAS6, r1	/* Search the current address space and PID */
+	isync
+	msync
 	tlbsx	0, r8
 	mfspr	r1, MAS1
 	andis.  r2, r1, MAS1_VALID@h	/* Check for the Valid bit */
@@ -370,6 +372,8 @@  purge_old_ccsr_tlb:
 
 	rlwinm	r1, r1, 0, 1, 31	/* Clear Valid bit */
 	mtspr	MAS1, r1
+	isync
+	msync
 	tlbwe
 1: