From patchwork Mon Oct 31 15:05:45 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lei Wen X-Patchwork-Id: 122850 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 7283CB6F7F for ; Tue, 1 Nov 2011 02:06:13 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id F1CC229209; Mon, 31 Oct 2011 16:06:11 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id oaTQc2gwDPln; Mon, 31 Oct 2011 16:06:11 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 7B46829217; Mon, 31 Oct 2011 16:06:10 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 6D69E291D4 for ; Mon, 31 Oct 2011 16:06:05 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 7u6RTnLBScnw for ; Mon, 31 Oct 2011 16:06:05 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from na3sys009aog122.obsmtp.com (na3sys009aog122.obsmtp.com [74.125.149.147]) by theia.denx.de (Postfix) with SMTP id 1748028F62 for ; Mon, 31 Oct 2011 16:05:56 +0100 (CET) Received: from MSI-MTA.marvell.com ([65.219.4.132]) by na3sys009aob122.postini.com ([74.125.148.12]) with SMTP; Mon, 31 Oct 2011 08:05:58 PDT Received: from maili.marvell.com ([10.68.76.51]) by MSI-MTA.marvell.com with Microsoft SMTPSVC(6.0.3790.3959); Mon, 31 Oct 2011 08:05:54 -0700 Received: from localhost (unknown [10.38.16.109]) by maili.marvell.com (Postfix) with ESMTP id CE3B08A002; Mon, 31 Oct 2011 08:05:54 -0700 (PDT) From: Lei Wen To: Prafulla Wadaskar , u-boot@lists.denx.de Date: Mon, 31 Oct 2011 08:05:45 -0700 Message-Id: <1320073546-7277-2-git-send-email-leiwen@marvell.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1320073546-7277-1-git-send-email-leiwen@marvell.com> References: <1320073546-7277-1-git-send-email-leiwen@marvell.com> X-OriginalArrivalTime: 31 Oct 2011 15:05:54.0938 (UTC) FILETIME=[967055A0:01CC97DE] Subject: [U-Boot] [PATCH 1/2] pantheon: define CONFIG_SYS_CACHELINE_SIZE X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de By default, on Pantheon SoC DCache Lnd ICache line lengths are 32 bytes long Signed-off-by: Lei Wen --- arch/arm/include/asm/arch-pantheon/config.h | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/arch/arm/include/asm/arch-pantheon/config.h b/arch/arm/include/asm/arch-pantheon/config.h index d10583d..e4fce7d 100644 --- a/arch/arm/include/asm/arch-pantheon/config.h +++ b/arch/arm/include/asm/arch-pantheon/config.h @@ -28,6 +28,8 @@ #include #define CONFIG_ARM926EJS 1 /* Basic Architecture */ +/* default Dcache Line length for pantheon */ +#define CONFIG_SYS_CACHELINE_SIZE 32 #define CONFIG_SYS_TCLK (14745600) /* NS16550 clk config */ #define CONFIG_SYS_HZ_CLOCK (3250000) /* Timer Freq. 3.25MHZ */