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Tue, 21 Jan 2020 11:08:22 +0000 Received: from e120487-lin.cambridge.arm.com (217.140.106.52) by LO2P265CA0081.GBRP265.PROD.OUTLOOK.COM (2603:10a6:600:8::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2644.19 via Frontend Transport; Tue, 21 Jan 2020 11:08:22 +0000 From: Matthew Malcomson To: "gcc-patches@gcc.gnu.org" CC: Marcus Shawcroft , Richard Sandiford , nd , Richard Earnshaw , Kyrylo Tkachov Subject: [AArch64] effective_target for aarch64 f64mm asm Date: Tue, 21 Jan 2020 11:08:22 +0000 Message-ID: Authentication-Results-Original: spf=none (sender IP is ) smtp.mailfrom=Matthew.Malcomson@arm.com; x-ms-exchange-transport-forked: True x-checkrecipientrouted: true x-ms-oob-tlc-oobclassifiers: OLM:517;OLM:517; X-Forefront-Antispam-Report-Untrusted: SFV:NSPM; SFS:(10009020)(4636009)(366004)(396003)(136003)(39860400002)(376002)(346002)(199004)(189003)(8936002)(8676002)(81166006)(81156014)(956004)(26005)(16526019)(186003)(54906003)(52536014)(52116002)(33656002)(44832011)(5660300002)(86362001)(4326008)(6512007)(9686003)(6916009)(6486002)(66946007)(64756008)(66446008)(66476007)(66616009)(478600001)(2906002)(66556008)(316002)(71200400001)(966005); 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X-MS-Exchange-Transport-CrossTenantHeadersStripped: VE1EUR03FT010.eop-EUR03.prod.protection.outlook.com X-MS-Office365-Filtering-Correlation-Id-Prvs: f52b3b17-1629-42b7-b172-08d79e623aa4 X-IsSubscribed: yes Commit 9ceec73 introduced intrinsics for the AArch64 FP64 matrix multiply instructions. These require binutils support for the same instructions. ( See https://gcc.gnu.org/ml/gcc-patches/2020-01/msg01234.html for the testsuite failures this introduced. ) This patch adds a DejaGNU test to ensure this binutils support is there and uses it in the files that need this test. NOTE: I tried to find some way to run the assembly tests if the given version of binutils is available, but run the compile tests if not. This is pretty awkward -- It seems I either have to duplicate all the DejaGNU comments between two files, or write filename exceptions into the list of files that aarch64-sve-acle-asm.exp runs tests for. I decided to not do either, since I figure not running the tests on older binutils isn't too bad compared to having a bunch more DejaGNU stuff making the tests harder to read. Testing Done: Checked on a cross-compiler that: Tests running for binutils commit e264b5b7a are listed as UNSUPPORTED. Tests running for binutils commit 26916852e all pass. gcc/testsuite/ChangeLog: 2020-01-21 Matthew Malcomson * gcc.target/aarch64/sve/acle/asm/ld1ro_f16.c: Use require directive. * gcc.target/aarch64/sve/acle/asm/ld1ro_f32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/ld1ro_f64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/ld1ro_s16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/ld1ro_s32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/ld1ro_s64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/ld1ro_s8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/ld1ro_u16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/ld1ro_u32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/ld1ro_u64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/ld1ro_u8.c: Likewise. * lib/target-supports.exp: Add assembly requirement directive. ############### Attachment also inlined for ease of reply ############### diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_f16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_f16.c index 7badc75a43ab2009e9406afc04c980fc01834716..6eb94f1ca5fda961bb23f5c4cf66bc5694d26f36 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_f16.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_f16.c @@ -1,5 +1,6 @@ /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ /* { dg-additional-options "-march=armv8.6-a+sve+f64mm" } */ +/* { dg-require-effective-target aarch64_asm_f64mm_ok } */ #include "test_sve_acle.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_f32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_f32.c index dd8a1c53cd0fb7b7acd0b92394f3977382ac26e0..0a77c37ddd5978db765b4bad23f24da82a0aed11 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_f32.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_f32.c @@ -1,5 +1,6 @@ /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ /* { dg-additional-options "-march=armv8.6-a+sve+f64mm" } */ +/* { dg-require-effective-target aarch64_asm_f64mm_ok } */ #include "test_sve_acle.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_f64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_f64.c index 30563698310f65060d34be4bef4c57a74ef9d734..65c6d9b02b804a1480cd5014c8f0ca5f534bacbe 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_f64.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_f64.c @@ -1,5 +1,6 @@ /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ /* { dg-additional-options "-march=armv8.6-a+sve+f64mm" } */ +/* { dg-require-effective-target aarch64_asm_f64mm_ok } */ #include "test_sve_acle.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s16.c index d4702fa6cc15e9f93751d8579cfecfd37759306e..e3dc9bd51cf93c2f97e4277181e686d0bf53a1ea 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s16.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s16.c @@ -1,5 +1,6 @@ /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ /* { dg-additional-options "-march=armv8.6-a+sve+f64mm" } */ +/* { dg-require-effective-target aarch64_asm_f64mm_ok } */ #include "test_sve_acle.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s32.c index 4604b0b5fbfb716ae814bf88f7acfe8bf0eaa9f5..f3af8e5cc25791a56930618abf5c092d51e94e9b 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s32.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s32.c @@ -1,5 +1,6 @@ /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ /* { dg-additional-options "-march=armv8.6-a+sve+f64mm" } */ +/* { dg-require-effective-target aarch64_asm_f64mm_ok } */ #include "test_sve_acle.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s64.c index dac98b293fb88f733ffcaec04a8b9861c3c502bf..c13622369138cdc6769b3e2f2977a886b7b23ad5 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s64.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s64.c @@ -1,5 +1,6 @@ /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ /* { dg-additional-options "-march=armv8.6-a+sve+f64mm" } */ +/* { dg-require-effective-target aarch64_asm_f64mm_ok } */ #include "test_sve_acle.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s8.c index 17df5dbb0d7302d9d735b13fb97111a657efbbfc..e9881c386f1d811096f5b599372f801e07ce0d27 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s8.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s8.c @@ -1,5 +1,6 @@ /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ /* { dg-additional-options "-march=armv8.6-a+sve+f64mm" } */ +/* { dg-require-effective-target aarch64_asm_f64mm_ok } */ #include "test_sve_acle.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u16.c index 611e9166b0ff6d98ab3d05799072484a623ae3a0..2529d90599fe0d07d66ab3db8f034ae039bed5ce 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u16.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u16.c @@ -1,5 +1,6 @@ /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ /* { dg-additional-options "-march=armv8.6-a+sve+f64mm" } */ +/* { dg-require-effective-target aarch64_asm_f64mm_ok } */ #include "test_sve_acle.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u32.c index 7cb5bb93aa008272f9d765be567f084da0adc9a6..2a1e261f3308aaad1a4cd48920dc8d508c84f57f 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u32.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u32.c @@ -1,5 +1,6 @@ /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ /* { dg-additional-options "-march=armv8.6-a+sve+f64mm" } */ +/* { dg-require-effective-target aarch64_asm_f64mm_ok } */ #include "test_sve_acle.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u64.c index 2194d52d5e3592e22d311be27573e254f16f2897..aa5bd5725af31ce81a73bb7234c2a6a46476513f 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u64.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u64.c @@ -1,5 +1,6 @@ /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ /* { dg-additional-options "-march=armv8.6-a+sve+f64mm" } */ +/* { dg-require-effective-target aarch64_asm_f64mm_ok } */ #include "test_sve_acle.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u8.c index b98c0c7444f6c50d6c4e185a431a49040a267154..6d181de6b46c5b46be62d94a5245a7cfe74c5afe 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u8.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u8.c @@ -1,5 +1,6 @@ /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ /* { dg-additional-options "-march=armv8.6-a+sve+f64mm" } */ +/* { dg-require-effective-target aarch64_asm_f64mm_ok } */ #include "test_sve_acle.h" diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index cdee31e24132b591625168ab588e61a3943919b0..c9184728f26918dbaea4bb09ab99df890571069b 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -8987,7 +8987,7 @@ proc check_effective_target_aarch64_tiny { } { # Create functions to check that the AArch64 assembler supports the # various architecture extensions via the .arch_extension pseudo-op. -foreach { aarch64_ext } { "fp" "simd" "crypto" "crc" "lse" "dotprod" "sve"} { +foreach { aarch64_ext } { "fp" "simd" "crypto" "crc" "lse" "dotprod" "sve" "f64mm"} { eval [string map [list FUNC $aarch64_ext] { proc check_effective_target_aarch64_asm_FUNC_ok { } { if { [istarget aarch64*-*-*] } { diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_f16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_f16.c index 7badc75a43ab2009e9406afc04c980fc01834716..6eb94f1ca5fda961bb23f5c4cf66bc5694d26f36 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_f16.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_f16.c @@ -1,5 +1,6 @@ /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ /* { dg-additional-options "-march=armv8.6-a+sve+f64mm" } */ +/* { dg-require-effective-target aarch64_asm_f64mm_ok } */ #include "test_sve_acle.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_f32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_f32.c index dd8a1c53cd0fb7b7acd0b92394f3977382ac26e0..0a77c37ddd5978db765b4bad23f24da82a0aed11 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_f32.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_f32.c @@ -1,5 +1,6 @@ /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ /* { dg-additional-options "-march=armv8.6-a+sve+f64mm" } */ +/* { dg-require-effective-target aarch64_asm_f64mm_ok } */ #include "test_sve_acle.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_f64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_f64.c index 30563698310f65060d34be4bef4c57a74ef9d734..65c6d9b02b804a1480cd5014c8f0ca5f534bacbe 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_f64.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_f64.c @@ -1,5 +1,6 @@ /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ /* { dg-additional-options "-march=armv8.6-a+sve+f64mm" } */ +/* { dg-require-effective-target aarch64_asm_f64mm_ok } */ #include "test_sve_acle.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s16.c index d4702fa6cc15e9f93751d8579cfecfd37759306e..e3dc9bd51cf93c2f97e4277181e686d0bf53a1ea 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s16.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s16.c @@ -1,5 +1,6 @@ /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ /* { dg-additional-options "-march=armv8.6-a+sve+f64mm" } */ +/* { dg-require-effective-target aarch64_asm_f64mm_ok } */ #include "test_sve_acle.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s32.c index 4604b0b5fbfb716ae814bf88f7acfe8bf0eaa9f5..f3af8e5cc25791a56930618abf5c092d51e94e9b 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s32.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s32.c @@ -1,5 +1,6 @@ /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ /* { dg-additional-options "-march=armv8.6-a+sve+f64mm" } */ +/* { dg-require-effective-target aarch64_asm_f64mm_ok } */ #include "test_sve_acle.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s64.c index dac98b293fb88f733ffcaec04a8b9861c3c502bf..c13622369138cdc6769b3e2f2977a886b7b23ad5 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s64.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s64.c @@ -1,5 +1,6 @@ /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ /* { dg-additional-options "-march=armv8.6-a+sve+f64mm" } */ +/* { dg-require-effective-target aarch64_asm_f64mm_ok } */ #include "test_sve_acle.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s8.c index 17df5dbb0d7302d9d735b13fb97111a657efbbfc..e9881c386f1d811096f5b599372f801e07ce0d27 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s8.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s8.c @@ -1,5 +1,6 @@ /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ /* { dg-additional-options "-march=armv8.6-a+sve+f64mm" } */ +/* { dg-require-effective-target aarch64_asm_f64mm_ok } */ #include "test_sve_acle.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u16.c index 611e9166b0ff6d98ab3d05799072484a623ae3a0..2529d90599fe0d07d66ab3db8f034ae039bed5ce 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u16.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u16.c @@ -1,5 +1,6 @@ /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ /* { dg-additional-options "-march=armv8.6-a+sve+f64mm" } */ +/* { dg-require-effective-target aarch64_asm_f64mm_ok } */ #include "test_sve_acle.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u32.c index 7cb5bb93aa008272f9d765be567f084da0adc9a6..2a1e261f3308aaad1a4cd48920dc8d508c84f57f 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u32.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u32.c @@ -1,5 +1,6 @@ /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ /* { dg-additional-options "-march=armv8.6-a+sve+f64mm" } */ +/* { dg-require-effective-target aarch64_asm_f64mm_ok } */ #include "test_sve_acle.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u64.c index 2194d52d5e3592e22d311be27573e254f16f2897..aa5bd5725af31ce81a73bb7234c2a6a46476513f 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u64.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u64.c @@ -1,5 +1,6 @@ /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ /* { dg-additional-options "-march=armv8.6-a+sve+f64mm" } */ +/* { dg-require-effective-target aarch64_asm_f64mm_ok } */ #include "test_sve_acle.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u8.c index b98c0c7444f6c50d6c4e185a431a49040a267154..6d181de6b46c5b46be62d94a5245a7cfe74c5afe 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u8.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u8.c @@ -1,5 +1,6 @@ /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ /* { dg-additional-options "-march=armv8.6-a+sve+f64mm" } */ +/* { dg-require-effective-target aarch64_asm_f64mm_ok } */ #include "test_sve_acle.h" diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index cdee31e24132b591625168ab588e61a3943919b0..c9184728f26918dbaea4bb09ab99df890571069b 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -8987,7 +8987,7 @@ proc check_effective_target_aarch64_tiny { } { # Create functions to check that the AArch64 assembler supports the # various architecture extensions via the .arch_extension pseudo-op. -foreach { aarch64_ext } { "fp" "simd" "crypto" "crc" "lse" "dotprod" "sve"} { +foreach { aarch64_ext } { "fp" "simd" "crypto" "crc" "lse" "dotprod" "sve" "f64mm"} { eval [string map [list FUNC $aarch64_ext] { proc check_effective_target_aarch64_asm_FUNC_ok { } { if { [istarget aarch64*-*-*] } {