From patchwork Sun Oct 30 13:50:14 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benoit Canet X-Patchwork-Id: 122610 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 3FDD2B6F88 for ; Mon, 31 Oct 2011 01:01:09 +1100 (EST) Received: from localhost ([::1]:46117 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RKVwc-0003j9-HV for incoming@patchwork.ozlabs.org; Sun, 30 Oct 2011 10:01:02 -0400 Received: from eggs.gnu.org ([140.186.70.92]:44290) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RKVwI-0003PL-AK for qemu-devel@nongnu.org; Sun, 30 Oct 2011 10:00:43 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RKVwG-0007SY-Ru for qemu-devel@nongnu.org; Sun, 30 Oct 2011 10:00:42 -0400 Received: from mail-ww0-f53.google.com ([74.125.82.53]:33467) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RKVwG-0007Q7-CJ for qemu-devel@nongnu.org; Sun, 30 Oct 2011 10:00:40 -0400 Received: by mail-ww0-f53.google.com with SMTP id 7so694331wwg.10 for ; Sun, 30 Oct 2011 07:00:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=5oEPUnOtgB5ArS7YkNA5Pz8l79EWGNuDA3NArJBPncs=; b=a7mu3/Se5aIw2JiEPrD7x6NMXRH0ZbVHE9oWEnvzS0dPFHJh0HnMBul7Pd0shg+oZ9 /jKUUavSmdnQAoy5Fxa6uNKSWAXPB+g4D5Op6OsU18+OayApxk4Tf88LpxqvB6RdY167 sGBow0SEhxJZCl8nZruR/fr4MnH/fzbruKLkE= Received: by 10.227.203.200 with SMTP id fj8mr14963352wbb.14.1319983239902; Sun, 30 Oct 2011 07:00:39 -0700 (PDT) Received: from Laure.box.in.chocolate-blue.net ([109.190.18.76]) by mx.google.com with ESMTPS id b5sm26842644wbh.4.2011.10.30.07.00.37 (version=SSLv3 cipher=OTHER); Sun, 30 Oct 2011 07:00:38 -0700 (PDT) From: =?UTF-8?q?Beno=C3=AEt=20Canet?= To: qemu-devel@nongnu.org Date: Sun, 30 Oct 2011 14:50:14 +0100 Message-Id: <1319982619-26657-5-git-send-email-benoit.canet@gmail.com> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1319982619-26657-1-git-send-email-benoit.canet@gmail.com> References: <1319982619-26657-1-git-send-email-benoit.canet@gmail.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) X-Received-From: 74.125.82.53 Cc: peter.maydell@linaro.org, =?UTF-8?q?Beno=C3=AEt=20Canet?= , avi@redhat.com Subject: [Qemu-devel] [PATCH 4/9] pxa2xx_pcmcia.c: convert io memory space to memory API X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Benoit Canet --- hw/pxa2xx_pcmcia.c | 31 +++++++++++++------------------ 1 files changed, 13 insertions(+), 18 deletions(-) diff --git a/hw/pxa2xx_pcmcia.c b/hw/pxa2xx_pcmcia.c index e5277ad..dc522dc 100644 --- a/hw/pxa2xx_pcmcia.c +++ b/hw/pxa2xx_pcmcia.c @@ -17,6 +17,7 @@ struct PXA2xxPCMCIAState { PCMCIACardState *card; MemoryRegion common_iomem; MemoryRegion attr_iomem; + MemoryRegion iomem; qemu_irq irq; qemu_irq cd_irq; @@ -66,8 +67,8 @@ static void pxa2xx_pcmcia_attr_write(void *opaque, target_phys_addr_t offset, } } -static uint32_t pxa2xx_pcmcia_io_read(void *opaque, - target_phys_addr_t offset) +static uint64_t pxa2xx_pcmcia_io_read(void *opaque, + target_phys_addr_t offset, unsigned size) { PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque; @@ -78,8 +79,8 @@ static uint32_t pxa2xx_pcmcia_io_read(void *opaque, return 0; } -static void pxa2xx_pcmcia_io_write(void *opaque, - target_phys_addr_t offset, uint32_t value) +static void pxa2xx_pcmcia_io_write(void *opaque, target_phys_addr_t offset, + uint64_t value, unsigned size) { PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque; @@ -100,16 +101,10 @@ static const MemoryRegionOps pxa2xx_pcmcia_attr_ops = { .endianness = DEVICE_NATIVE_ENDIAN }; -static CPUReadMemoryFunc * const pxa2xx_pcmcia_io_readfn[] = { - pxa2xx_pcmcia_io_read, - pxa2xx_pcmcia_io_read, - pxa2xx_pcmcia_io_read, -}; - -static CPUWriteMemoryFunc * const pxa2xx_pcmcia_io_writefn[] = { - pxa2xx_pcmcia_io_write, - pxa2xx_pcmcia_io_write, - pxa2xx_pcmcia_io_write, +static const MemoryRegionOps pxa2xx_pcmcia_io_ops = { + .read = pxa2xx_pcmcia_io_read, + .write = pxa2xx_pcmcia_io_write, + .endianness = DEVICE_NATIVE_ENDIAN }; static void pxa2xx_pcmcia_set_irq(void *opaque, int line, int level) @@ -124,16 +119,16 @@ static void pxa2xx_pcmcia_set_irq(void *opaque, int line, int level) PXA2xxPCMCIAState *pxa2xx_pcmcia_init(MemoryRegion *sysmem, target_phys_addr_t base) { - int iomemtype; PXA2xxPCMCIAState *s; s = (PXA2xxPCMCIAState *) g_malloc0(sizeof(PXA2xxPCMCIAState)); /* Socket I/O Memory Space */ - iomemtype = cpu_register_io_memory(pxa2xx_pcmcia_io_readfn, - pxa2xx_pcmcia_io_writefn, s, DEVICE_NATIVE_ENDIAN); - cpu_register_physical_memory(base | 0x00000000, 0x04000000, iomemtype); + memory_region_init_io(&s->iomem, &pxa2xx_pcmcia_io_ops, s, + "pxa2xx-pcmcia-io", 0x04000000); + memory_region_add_subregion(sysmem, base | 0x00000000, + &s->iomem); /* Then next 64 MB is reserved */