From patchwork Sun Oct 30 13:50:13 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benoit Canet X-Patchwork-Id: 122609 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id ED442B6F86 for ; Mon, 31 Oct 2011 01:01:04 +1100 (EST) Received: from localhost ([::1]:45668 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RKVwW-0003To-50 for incoming@patchwork.ozlabs.org; Sun, 30 Oct 2011 10:00:56 -0400 Received: from eggs.gnu.org ([140.186.70.92]:44279) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RKVwH-0003Lo-6h for qemu-devel@nongnu.org; Sun, 30 Oct 2011 10:00:42 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RKVwF-0007SG-Ca for qemu-devel@nongnu.org; Sun, 30 Oct 2011 10:00:41 -0400 Received: from mail-wy0-f173.google.com ([74.125.82.173]:56667) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RKVwF-0007S6-60 for qemu-devel@nongnu.org; Sun, 30 Oct 2011 10:00:39 -0400 Received: by wyh15 with SMTP id 15so5855355wyh.4 for ; Sun, 30 Oct 2011 07:00:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=sS9P+k2qZApHEYq/90XCaSqqcosFMndhl6ua9OohaeY=; b=GxqNyH9a/iO+ujRoTYDNBpxxKSlbIq38/jONeGyQ5qzsKn6p+zSAqPsDA8u8Bu2mtM rjwk8O/qF0MTNRwmsBaDFArhviGAWqsMrsQoYtNIbadHmdc9juJYAKbz64YwDeiQi4Zv dWK4XGjWbe5wRciwUxPza4EG9Vr8kqNqvmZsc= Received: by 10.216.229.162 with SMTP id h34mr1139096weq.82.1319983237893; Sun, 30 Oct 2011 07:00:37 -0700 (PDT) Received: from Laure.box.in.chocolate-blue.net ([109.190.18.76]) by mx.google.com with ESMTPS id b5sm26842644wbh.4.2011.10.30.07.00.36 (version=SSLv3 cipher=OTHER); Sun, 30 Oct 2011 07:00:37 -0700 (PDT) From: =?UTF-8?q?Beno=C3=AEt=20Canet?= To: qemu-devel@nongnu.org Date: Sun, 30 Oct 2011 14:50:13 +0100 Message-Id: <1319982619-26657-4-git-send-email-benoit.canet@gmail.com> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1319982619-26657-1-git-send-email-benoit.canet@gmail.com> References: <1319982619-26657-1-git-send-email-benoit.canet@gmail.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) X-Received-From: 74.125.82.173 Cc: peter.maydell@linaro.org, =?UTF-8?q?Beno=C3=AEt=20Canet?= , avi@redhat.com Subject: [Qemu-devel] [PATCH 3/9] pxa2xx_pcmcia.c: convert attribute memory space to memory API X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Benoit Canet --- hw/pxa2xx_pcmcia.c | 31 ++++++++++++++----------------- 1 files changed, 14 insertions(+), 17 deletions(-) diff --git a/hw/pxa2xx_pcmcia.c b/hw/pxa2xx_pcmcia.c index 6d1e96c..e5277ad 100644 --- a/hw/pxa2xx_pcmcia.c +++ b/hw/pxa2xx_pcmcia.c @@ -11,10 +11,12 @@ #include "pcmcia.h" #include "pxa.h" + struct PXA2xxPCMCIAState { PCMCIASocket slot; PCMCIACardState *card; MemoryRegion common_iomem; + MemoryRegion attr_iomem; qemu_irq irq; qemu_irq cd_irq; @@ -42,8 +44,8 @@ static void pxa2xx_pcmcia_common_write(void *opaque, target_phys_addr_t offset, } } -static uint32_t pxa2xx_pcmcia_attr_read(void *opaque, - target_phys_addr_t offset) +static uint64_t pxa2xx_pcmcia_attr_read(void *opaque, + target_phys_addr_t offset, unsigned size) { PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque; @@ -54,8 +56,8 @@ static uint32_t pxa2xx_pcmcia_attr_read(void *opaque, return 0; } -static void pxa2xx_pcmcia_attr_write(void *opaque, - target_phys_addr_t offset, uint32_t value) +static void pxa2xx_pcmcia_attr_write(void *opaque, target_phys_addr_t offset, + uint64_t value, unsigned size) { PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque; @@ -92,16 +94,10 @@ static const MemoryRegionOps pxa2xx_pcmcia_common_ops = { .endianness = DEVICE_NATIVE_ENDIAN }; -static CPUReadMemoryFunc * const pxa2xx_pcmcia_attr_readfn[] = { - pxa2xx_pcmcia_attr_read, - pxa2xx_pcmcia_attr_read, - pxa2xx_pcmcia_attr_read, -}; - -static CPUWriteMemoryFunc * const pxa2xx_pcmcia_attr_writefn[] = { - pxa2xx_pcmcia_attr_write, - pxa2xx_pcmcia_attr_write, - pxa2xx_pcmcia_attr_write, +static const MemoryRegionOps pxa2xx_pcmcia_attr_ops = { + .read = pxa2xx_pcmcia_attr_read, + .write = pxa2xx_pcmcia_attr_write, + .endianness = DEVICE_NATIVE_ENDIAN }; static CPUReadMemoryFunc * const pxa2xx_pcmcia_io_readfn[] = { @@ -142,9 +138,10 @@ PXA2xxPCMCIAState *pxa2xx_pcmcia_init(MemoryRegion *sysmem, /* Then next 64 MB is reserved */ /* Socket Attribute Memory Space */ - iomemtype = cpu_register_io_memory(pxa2xx_pcmcia_attr_readfn, - pxa2xx_pcmcia_attr_writefn, s, DEVICE_NATIVE_ENDIAN); - cpu_register_physical_memory(base | 0x08000000, 0x04000000, iomemtype); + memory_region_init_io(&s->attr_iomem, &pxa2xx_pcmcia_attr_ops, s, + "pxa2xx-pcmcia-attribute", 0x04000000); + memory_region_add_subregion(sysmem, base | 0x08000000, + &s->attr_iomem); /* Socket Common Memory Space */ memory_region_init_io(&s->common_iomem, &pxa2xx_pcmcia_common_ops, s,