===================================================================
RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-4.5/changes.html,v
retrieving revision 1.102
@@ -877,7 +877,7 @@
complete (that is, it is possible that some PRs that have been fixed
are not listed here).</p>
-<p>On the PowerPC compiler, the altivec builtin functions <code>vec_ld</code>
+<p>On the PowerPC compiler, the Altivec builtin functions <code>vec_ld</code>
and <code>vec_st</code> have been modified to generate the Altivec memory
instructions <code>LVX</code> and <code>STVX</code>, even if the
<code>-mvsx</code> option is used. In the initial GCC 4.5 release, these
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RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-4.6/changes.html,v
retrieving revision 1.135
@@ -895,7 +895,7 @@
for <code>MODEL</code>
are <code>small</code>, <code>medium</code>,
or <code>large</code>.</li>
- <li>The altivec builtin functions <code>vec_ld</code> and <code>vec_st</code>
+ <li>The Altivec builtin functions <code>vec_ld</code> and <code>vec_st</code>
have been modified to generate the Altivec memory instructions
<code>LVX</code> and <code>STVX</code>, even if the <code>-mvsx</code>
option is used. In the initial GCC 4.5 release, these builtin functions
@@ -1083,7 +1083,7 @@
<li>
On Power7 systems, there is a potential problem if you build the GCC
- compiler with a host compiler using options that enables the VSX
+ compiler with a host compiler using options that enable the VSX
instruction set generation. If the host compiler has been patched so that
the <code>vec_ld</code> and <code>vec_st</code> builtin functions
generate Altivec memory instructions instead of VSX memory instructions,