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[4/4] dt-bindings: net: adin: document 1588 TX/RX SOP bindings

Message ID 20200116091454.16032-5-alexandru.ardelean@analog.com
State Changes Requested, archived
Headers show
Series net: phy: adin: implement support for 1588 start-of-packet indication | expand

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Context Check Description
robh/checkpatch success
robh/dt-meta-schema success

Commit Message

Alexandru Ardelean Jan. 16, 2020, 9:14 a.m. UTC 
This change documents the device-tree bindings for the TX/RX indication of
IEEE 1588 packets.

Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com>
---
 .../devicetree/bindings/net/adi,adin.yaml     | 60 +++++++++++++++++++
 1 file changed, 60 insertions(+)

Comments

Andrew Lunn Jan. 16, 2020, 1:43 p.m. UTC | #1 
> +  adi,1588-rx-sop-delays-cycles:
> +    allOf:
> +      - $ref: /schemas/types.yaml#definitions/uint8-array
> +      - items:
> +          - minItems: 3
> +            maxItems: 3
> +    description: |
> +      Enables Start Packet detection (SOP) for received IEEE 1588 time stamp
> +      controls, and configures the number of cycles (of the MII RX_CLK clock)
> +      to delay the indication of RX SOP frames for 10/100/1000 BASE-T links.
> +      The first element (in the array) configures the delay for 10BASE-T,
> +      the second for 100BASE-T, and the third for 1000BASE-T.

Do you know the clock frequency? It would be much better to express
this in ns, as with adi,1588-tx-sop-delays-ns.

> @@ -62,5 +116,11 @@ examples:
>              reg = <1>;
>  
>              adi,fifo-depth-bits = <16>;
> +
> +            adi,1588-rx-sop-delays-cycles = [ 00 00 00 ];
> +            adi,1588-rx-sop-pin-name = "int_n";
> +
> +            adi,1588-tx-sop-delays-ns = [ 00 08 10 ];

10 is not a multiple of 8!

   Andrew
Alexandru Ardelean Jan. 16, 2020, 2 p.m. UTC | #2 
On Thu, 2020-01-16 at 14:43 +0100, Andrew Lunn wrote:
> [External]
> 
> > +  adi,1588-rx-sop-delays-cycles:
> > +    allOf:
> > +      - $ref: /schemas/types.yaml#definitions/uint8-array
> > +      - items:
> > +          - minItems: 3
> > +            maxItems: 3
> > +    description: |
> > +      Enables Start Packet detection (SOP) for received IEEE 1588 time
> > stamp
> > +      controls, and configures the number of cycles (of the MII RX_CLK
> > clock)
> > +      to delay the indication of RX SOP frames for 10/100/1000 BASE-T
> > links.
> > +      The first element (in the array) configures the delay for
> > 10BASE-T,
> > +      the second for 100BASE-T, and the third for 1000BASE-T.
> 
> Do you know the clock frequency? It would be much better to express
> this in ns, as with adi,1588-tx-sop-delays-ns.

Yep.
We know the clock frequency here.
I'll take a look about converting this.

> 
> > @@ -62,5 +116,11 @@ examples:
> >              reg = <1>;
> >  
> >              adi,fifo-depth-bits = <16>;
> > +
> > +            adi,1588-rx-sop-delays-cycles = [ 00 00 00 ];
> > +            adi,1588-rx-sop-pin-name = "int_n";
> > +
> > +            adi,1588-tx-sop-delays-ns = [ 00 08 10 ];
> 
> 10 is not a multiple of 8!

My bad here.
I should point-out somewhere that these are hex-values.
It's kind of implied via the DT uint8 array type.

> 
>    Andrew
Rob Herring Jan. 22, 2020, 2:05 a.m. UTC | #3 
On Thu, Jan 16, 2020 at 11:14:54AM +0200, Alexandru Ardelean wrote:
> This change documents the device-tree bindings for the TX/RX indication of
> IEEE 1588 packets.
> 
> Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com>
> ---
>  .../devicetree/bindings/net/adi,adin.yaml     | 60 +++++++++++++++++++
>  1 file changed, 60 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/net/adi,adin.yaml b/Documentation/devicetree/bindings/net/adi,adin.yaml
> index d95cc691a65f..eb56f35309e0 100644
> --- a/Documentation/devicetree/bindings/net/adi,adin.yaml
> +++ b/Documentation/devicetree/bindings/net/adi,adin.yaml
> @@ -36,6 +36,60 @@ properties:
>      enum: [ 4, 8, 12, 16, 20, 24 ]
>      default: 8
>  
> +  adi,1588-rx-sop-delays-cycles:
> +    allOf:
> +      - $ref: /schemas/types.yaml#definitions/uint8-array
> +      - items:
> +          - minItems: 3
> +            maxItems: 3

You can split up the description into constraints something like this 
(and minItems/maxItems becomes implied):

items:
  - description: delay for 10BASE-T
  - description: delay for 100BASE-T
  - description: delay for 1000BASE-T

> +    description: |
> +      Enables Start Packet detection (SOP) for received IEEE 1588 time stamp
> +      controls, and configures the number of cycles (of the MII RX_CLK clock)
> +      to delay the indication of RX SOP frames for 10/100/1000 BASE-T links.
> +      The first element (in the array) configures the delay for 10BASE-T,
> +      the second for 100BASE-T, and the third for 1000BASE-T.
> +
> +  adi,1588-rx-sop-pin-name:
> +    description: |
> +      This option must be used in together with 'adi,1588-rx-sop-delays-cycles'
> +      to specify which physical pin should be used to signal the MAC that
> +      the PHY is currently processing an IEEE 1588 timestamp control packet.
> +      The driver will report an error if the value of this property is the
> +      same as 'adi,1588-tx-sop-pin-name'
> +    enum:
> +      - gp_clk
> +      - link_st
> +      - int_n
> +      - led_0
> +
> +  adi,1588-tx-sop-delays-ns:
> +    allOf:
> +      - $ref: /schemas/types.yaml#definitions/uint8-array
> +      - items:
> +          - minItems: 3
> +            maxItems: 3

This should be:

      - minItems: 3
        maxItems: 3
        items:
          multipleOf: 8

> +    description: |
> +      Enables Start Packet detection (SOP) for IEEE 1588 time stamp controls,
> +      and configures the number of nano-seconds to delay the indication of
> +      TX frames for 10/100/1000 BASE-T links.
> +      The first element (in the array) configures the delay for 10BASE-T,
> +      the second for 100BASE-T, and the third for 1000BASE-T.
> +      The delays must be multiples of 8 ns (i.e. 8, 16, 24, etc).
> +
> +  adi,1588-tx-sop-pin-name:
> +    description: |
> +      This option must be used in together with 'adi,1588-tx-sop-delays-ns'
> +      to specify which physical pin should be used to signal the MAC that
> +      the PHY is currently processing an IEEE 1588 timestamp control packet
> +      on the TX path.
> +      The driver will report an error if the value of this property is the
> +      same as 'adi,1588-rx-sop-pin-name'
> +    enum:
> +      - gp_clk
> +      - link_st
> +      - int_n
> +      - led_0
> +
>  examples:
>    - |
>      ethernet {
> @@ -62,5 +116,11 @@ examples:
>              reg = <1>;
>  
>              adi,fifo-depth-bits = <16>;
> +
> +            adi,1588-rx-sop-delays-cycles = [ 00 00 00 ];
> +            adi,1588-rx-sop-pin-name = "int_n";
> +
> +            adi,1588-tx-sop-delays-ns = [ 00 08 10 ];
> +            adi,1588-tx-sop-pin-name = "led_0";
>          };
>      };
> -- 
> 2.20.1
>
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/net/adi,adin.yaml b/Documentation/devicetree/bindings/net/adi,adin.yaml
index d95cc691a65f..eb56f35309e0 100644
--- a/Documentation/devicetree/bindings/net/adi,adin.yaml
+++ b/Documentation/devicetree/bindings/net/adi,adin.yaml
@@ -36,6 +36,60 @@  properties:
     enum: [ 4, 8, 12, 16, 20, 24 ]
     default: 8
 
+  adi,1588-rx-sop-delays-cycles:
+    allOf:
+      - $ref: /schemas/types.yaml#definitions/uint8-array
+      - items:
+          - minItems: 3
+            maxItems: 3
+    description: |
+      Enables Start Packet detection (SOP) for received IEEE 1588 time stamp
+      controls, and configures the number of cycles (of the MII RX_CLK clock)
+      to delay the indication of RX SOP frames for 10/100/1000 BASE-T links.
+      The first element (in the array) configures the delay for 10BASE-T,
+      the second for 100BASE-T, and the third for 1000BASE-T.
+
+  adi,1588-rx-sop-pin-name:
+    description: |
+      This option must be used in together with 'adi,1588-rx-sop-delays-cycles'
+      to specify which physical pin should be used to signal the MAC that
+      the PHY is currently processing an IEEE 1588 timestamp control packet.
+      The driver will report an error if the value of this property is the
+      same as 'adi,1588-tx-sop-pin-name'
+    enum:
+      - gp_clk
+      - link_st
+      - int_n
+      - led_0
+
+  adi,1588-tx-sop-delays-ns:
+    allOf:
+      - $ref: /schemas/types.yaml#definitions/uint8-array
+      - items:
+          - minItems: 3
+            maxItems: 3
+    description: |
+      Enables Start Packet detection (SOP) for IEEE 1588 time stamp controls,
+      and configures the number of nano-seconds to delay the indication of
+      TX frames for 10/100/1000 BASE-T links.
+      The first element (in the array) configures the delay for 10BASE-T,
+      the second for 100BASE-T, and the third for 1000BASE-T.
+      The delays must be multiples of 8 ns (i.e. 8, 16, 24, etc).
+
+  adi,1588-tx-sop-pin-name:
+    description: |
+      This option must be used in together with 'adi,1588-tx-sop-delays-ns'
+      to specify which physical pin should be used to signal the MAC that
+      the PHY is currently processing an IEEE 1588 timestamp control packet
+      on the TX path.
+      The driver will report an error if the value of this property is the
+      same as 'adi,1588-rx-sop-pin-name'
+    enum:
+      - gp_clk
+      - link_st
+      - int_n
+      - led_0
+
 examples:
   - |
     ethernet {
@@ -62,5 +116,11 @@  examples:
             reg = <1>;
 
             adi,fifo-depth-bits = <16>;
+
+            adi,1588-rx-sop-delays-cycles = [ 00 00 00 ];
+            adi,1588-rx-sop-pin-name = "int_n";
+
+            adi,1588-tx-sop-delays-ns = [ 00 08 10 ];
+            adi,1588-tx-sop-pin-name = "led_0";
         };
     };