@@ -1,5 +1,8 @@
2011-10-27 David S. Miller <davem@davemloft.net>
+ * config/sparc/sparc.md (64-bit vector moves): Use 'e' not 'f'
+ constraint.
+
* regcprop.c (copyprop_hardreg_forward_1): Reject the
transformation when we narrow the mode on big endian.
@@ -7686,8 +7686,8 @@
(set_attr "cpu_feature" "vis,vis,vis,*,*,*,*,*,*,vis3,vis3")])
(define_insn "*mov<VM64:mode>_insn_sp64"
- [(set (match_operand:VM64 0 "nonimmediate_operand" "=e,e,e,e,m,m,*r, m,*r, f,*r")
- (match_operand:VM64 1 "input_operand" "Y,C,e,m,e,Y, m,*r, f,*r,*r"))]
+ [(set (match_operand:VM64 0 "nonimmediate_operand" "=e,e,e,e,m,m,*r, m,*r, e,*r")
+ (match_operand:VM64 1 "input_operand" "Y,C,e,m,e,Y, m,*r, e,*r,*r"))]
"TARGET_VIS
&& TARGET_ARCH64
&& (register_operand (operands[0], <VM64:MODE>mode)