[v3] net: phy: dp83867: Set FORCE_LINK_GOOD to default after reset
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Message ID 20200115080105.15641-1-m.grzeschik@pengutronix.de
State Changes Requested
Delegated to: David Miller
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Series
  • [v3] net: phy: dp83867: Set FORCE_LINK_GOOD to default after reset
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Commit Message

Michael Grzeschik Jan. 15, 2020, 8:01 a.m. UTC
According to the Datasheet this bit should be 0 (Normal operation) in
default. With the FORCE_LINK_GOOD bit set, it is not possible to get a
link. This patch sets FORCE_LINK_GOOD to the default value after
resetting the phy.

Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
---
v1 -> v2: - fixed typo in subject line
          - used phy_modify instead of read/write
v2 -> v3: - returned dp83867_phy_reset with phy_modify call

 drivers/net/phy/dp83867.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

Comments

David Miller Jan. 16, 2020, 12:57 p.m. UTC | #1
From: Michael Grzeschik <m.grzeschik@pengutronix.de>
Date: Wed, 15 Jan 2020 09:01:07 +0100

> According to the Datasheet this bit should be 0 (Normal operation) in
> default. With the FORCE_LINK_GOOD bit set, it is not possible to get a
> link. This patch sets FORCE_LINK_GOOD to the default value after
> resetting the phy.
> 
> Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>

This doesn't apply to the 'net' GIT tree, please respin.

Patch
diff mbox series

diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c
index adda0d0eab800..967f57ed0b65e 100644
--- a/drivers/net/phy/dp83867.c
+++ b/drivers/net/phy/dp83867.c
@@ -99,6 +99,7 @@ 
 #define DP83867_PHYCR_TX_FIFO_DEPTH_MASK	GENMASK(15, 14)
 #define DP83867_PHYCR_RX_FIFO_DEPTH_MASK	GENMASK(13, 12)
 #define DP83867_PHYCR_RESERVED_MASK		BIT(11)
+#define DP83867_PHYCR_FORCE_LINK_GOOD		BIT(10)
 
 /* RGMIIDCTL bits */
 #define DP83867_RGMII_TX_CLK_DELAY_MAX		0xf
@@ -635,7 +636,12 @@  static int dp83867_phy_reset(struct phy_device *phydev)
 
 	usleep_range(10, 20);
 
-	return 0;
+	/* After reset FORCE_LINK_GOOD bit is set. Although the
+	 * default value should be unset. Disable FORCE_LINK_GOOD
+	 * for the phy to work properly.
+	 */
+	return phy_modify(phydev, MII_DP83867_PHYCTRL,
+			 DP83867_PHYCR_FORCE_LINK_GOOD, 0);
 }
 
 static struct phy_driver dp83867_driver[] = {